<!-- Control FPGA mgt 2quad registers  -->
<node fwinfo="endpoint;width=3">
	<node id="control"    address="0x0">
	   <node id="loopback"    mask="0x7"/>
	   <node id="tx_prbs"     mask="0x70"/>
   </node>
	<node id="pulse"   permission="rw"   address="0x1">
	   <node id="tx_reset"    mask="0x1"/>
	   <node id="rx_reset"    mask="0x2"/>
	   <node id="gttx_reset"  mask="0x4"/>
	   <node id="gtrx_reset"  mask="0x8"/>
   </node>
	<node id="quad_status"  permission="r" address="0x4">
	   <node id="qpll_0_locked"  mask="0x1"/>
	   <node id="qpll_1_locked"  mask="0x2"/>
	   <node id="qpll_0_reflost" mask="0x10"/>
	   <node id="qpll_1_reflost" mask="0x20"/>
   </node>
	<node id="tx_status"  permission="r" address="0x5">
	   <node id="q_0_resetdone"    mask="0x00f"/>
	   <node id="q_1_resetdone"    mask="0x0f0"/>
   </node>
	<node id="rx_status"  permission="r" address="0x6">
	   <node id="q_0_reset_done"    mask="0x00f"/>
	   <node id="q_1_reset_done"    mask="0x0f0"/>
	   <node id="q_0_byte_aligned"  mask="0x00f0000"/>
	   <node id="q_1_byte_aligned"  mask="0x0f00000"/>
   </node>
</node>
