// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov  6 21:39:14 MST 2019
// Date        : Mon Mar 21 18:28:35 2022
// Host        : hog-efex3.cern.ch running 64-bit CentOS Linux release 7.9.2009 (Core)
// Command     : write_verilog -force -mode synth_stub
//               /home/gitlab-runner/builds/xeGdLrzp/0/atlas-l1calo-efex/RODFirmware/IP/bkpln_jfex/aurora_1ln_rx_lpm/aurora_1ln_rx_lpm_stub.v
// Design      : aurora_1ln_rx_lpm
// Purpose     : Stub declaration of top-level module interface
// Device      : xc7vx550tffg1927-2
// --------------------------------------------------------------------------------

// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
// Please paste the declaration into a Verilog source file or add the file as an additional source.
module aurora_1ln_rx_lpm(m_axi_rx_tdata, m_axi_rx_tvalid, 
  m_axi_rx_tkeep, m_axi_rx_tlast, m_axi_ufc_rx_tdata, m_axi_ufc_rx_tkeep, 
  m_axi_ufc_rx_tvalid, m_axi_ufc_rx_tlast, rxp, rxn, gt_refclk1, frame_err, rx_hard_err, 
  soft_err, rx_lane_up, rx_channel_up, user_clk, sync_clk, rx_system_reset, power_down, loopback, 
  gt_reset, tx_lock, sys_reset_out, init_clk_in, rx_resetdone_out, link_reset_out, drpclk_in, 
  drpaddr_in, drpdi_in, drpdo_out, drpen_in, drprdy_out, drpwe_in, gt0_cplllock_out, 
  gt0_rxlpmen_in, gt0_rxcdrovrden_in, gt0_rxdfelpmreset_in, gt0_rxmonitorout_out, 
  gt0_rxmonitorsel_in, gt0_rxcdrhold_in, gt0_eyescanreset_in, gt0_eyescandataerror_out, 
  gt0_eyescantrigger_in, gt0_rxbyteisaligned_out, gt0_rxcommadet_out, gt0_rxprbserr_out, 
  gt0_rxprbssel_in, gt0_rxprbscntreset_in, gt0_rxpcsreset_in, gt0_rxpmareset_in, 
  gt0_rxpmaresetdone_out, gt0_dmonitorout_out, gt0_rxbufreset_in, gt0_rx_disp_err_out, 
  gt0_rx_not_in_table_out, gt0_rx_realign_out, gt0_rx_buf_err_out, gt0_rxresetdone_out, 
  gt0_rxbufstatus_out, gt0_qplllock_in, gt0_qpllrefclklost_in, gt0_qpllreset_out, 
  gt_qpllclk_quad1_in, gt_qpllrefclk_quad1_in, tx_out_clk, pll_not_locked)
/* synthesis syn_black_box black_box_pad_pin="m_axi_rx_tdata[31:0],m_axi_rx_tvalid,m_axi_rx_tkeep[3:0],m_axi_rx_tlast,m_axi_ufc_rx_tdata[31:0],m_axi_ufc_rx_tkeep[3:0],m_axi_ufc_rx_tvalid,m_axi_ufc_rx_tlast,rxp[0:0],rxn[0:0],gt_refclk1,frame_err,rx_hard_err,soft_err,rx_lane_up[0:0],rx_channel_up,user_clk,sync_clk,rx_system_reset,power_down,loopback[2:0],gt_reset,tx_lock,sys_reset_out,init_clk_in,rx_resetdone_out,link_reset_out,drpclk_in,drpaddr_in[8:0],drpdi_in[15:0],drpdo_out[15:0],drpen_in,drprdy_out,drpwe_in,gt0_cplllock_out,gt0_rxlpmen_in,gt0_rxcdrovrden_in,gt0_rxdfelpmreset_in,gt0_rxmonitorout_out[6:0],gt0_rxmonitorsel_in[1:0],gt0_rxcdrhold_in,gt0_eyescanreset_in,gt0_eyescandataerror_out,gt0_eyescantrigger_in,gt0_rxbyteisaligned_out,gt0_rxcommadet_out,gt0_rxprbserr_out,gt0_rxprbssel_in[2:0],gt0_rxprbscntreset_in,gt0_rxpcsreset_in,gt0_rxpmareset_in,gt0_rxpmaresetdone_out,gt0_dmonitorout_out[14:0],gt0_rxbufreset_in,gt0_rx_disp_err_out[3:0],gt0_rx_not_in_table_out[3:0],gt0_rx_realign_out,gt0_rx_buf_err_out,gt0_rxresetdone_out,gt0_rxbufstatus_out[2:0],gt0_qplllock_in,gt0_qpllrefclklost_in,gt0_qpllreset_out,gt_qpllclk_quad1_in,gt_qpllrefclk_quad1_in,tx_out_clk,pll_not_locked" */;
  output [31:0]m_axi_rx_tdata;
  output m_axi_rx_tvalid;
  output [3:0]m_axi_rx_tkeep;
  output m_axi_rx_tlast;
  output [31:0]m_axi_ufc_rx_tdata;
  output [3:0]m_axi_ufc_rx_tkeep;
  output m_axi_ufc_rx_tvalid;
  output m_axi_ufc_rx_tlast;
  input [0:0]rxp;
  input [0:0]rxn;
  input gt_refclk1;
  output frame_err;
  output rx_hard_err;
  output soft_err;
  output [0:0]rx_lane_up;
  output rx_channel_up;
  input user_clk;
  input sync_clk;
  input rx_system_reset;
  input power_down;
  input [2:0]loopback;
  input gt_reset;
  output tx_lock;
  output sys_reset_out;
  input init_clk_in;
  output rx_resetdone_out;
  output link_reset_out;
  input drpclk_in;
  input [8:0]drpaddr_in;
  input [15:0]drpdi_in;
  output [15:0]drpdo_out;
  input drpen_in;
  output drprdy_out;
  input drpwe_in;
  output gt0_cplllock_out;
  input gt0_rxlpmen_in;
  input gt0_rxcdrovrden_in;
  input gt0_rxdfelpmreset_in;
  output [6:0]gt0_rxmonitorout_out;
  input [1:0]gt0_rxmonitorsel_in;
  input gt0_rxcdrhold_in;
  input gt0_eyescanreset_in;
  output gt0_eyescandataerror_out;
  input gt0_eyescantrigger_in;
  output gt0_rxbyteisaligned_out;
  output gt0_rxcommadet_out;
  output gt0_rxprbserr_out;
  input [2:0]gt0_rxprbssel_in;
  input gt0_rxprbscntreset_in;
  input gt0_rxpcsreset_in;
  input gt0_rxpmareset_in;
  output gt0_rxpmaresetdone_out;
  output [14:0]gt0_dmonitorout_out;
  input gt0_rxbufreset_in;
  output [3:0]gt0_rx_disp_err_out;
  output [3:0]gt0_rx_not_in_table_out;
  output gt0_rx_realign_out;
  output gt0_rx_buf_err_out;
  output gt0_rxresetdone_out;
  output [2:0]gt0_rxbufstatus_out;
  input gt0_qplllock_in;
  input gt0_qpllrefclklost_in;
  output gt0_qpllreset_out;
  input gt_qpllclk_quad1_in;
  input gt_qpllrefclk_quad1_in;
  output tx_out_clk;
  input pll_not_locked;
endmodule
