Index of /efex/firmware/ROD/official/v0.5.24/rod_jfex-v0.5.24/reports
Name Last modified Size Description
![[PARENTDIR]](/_shared_static_content/icons/back.gif)
Parent Directory -
![[TXT]](/_shared_static_content/icons/text.gif)
DPram_32b_synth_1.log 2023-10-03 15:22 35K
![[ ]](/_shared_static_content/icons/unknown.gif)
DPram_32b_utilization_synth.rpt 2023-10-03 15:22 7.6K
MGT_combined_ttc_rx_synth_1.log 2023-10-03 15:22 62K
MGT_combined_ttc_rx_utilization_synth.rpt 2023-10-03 15:22 8.4K
aurora_1ln_rx_lpm_synth_1.log 2023-10-03 15:22 132K
aurora_1ln_rx_lpm_utilization_synth.rpt 2023-10-03 15:22 8.4K
aurora_fifo_in_ila_synth_1.log 2023-10-03 15:22 229K
aurora_fifo_in_ila_utilization_synth.rpt 2023-10-03 15:22 8.5K
aurora_fifo_out_ila_synth_1.log 2023-10-03 15:22 225K
aurora_fifo_out_ila_utilization_synth.rpt 2023-10-03 15:22 8.4K
aurora_in_fifo_synth_1.log 2023-10-03 15:22 51K
aurora_in_fifo_utilization_synth.rpt 2023-10-03 15:22 8.3K
axi_ch0_synth_1.log 2023-10-03 15:22 221K
axi_ch0_utilization_synth.rpt 2023-10-03 15:22 8.4K
axi_ila_1_synth_1.log 2023-10-03 15:22 229K
axi_ila_1_utilization_synth.rpt 2023-10-03 15:22 8.5K
axis_data_fifo_0_synth_1.log 2023-10-03 15:22 47K
axis_data_fifo_0_utilization_synth.rpt 2023-10-03 15:22 8.2K
axis_dwidth_64_32_synth_1.log 2023-10-03 15:22 32K
axis_dwidth_64_32_utilization_synth.rpt 2023-10-03 15:22 7.8K
axis_input_fifo_synth_1.log 2023-10-03 15:22 49K
axis_input_fifo_utilization_synth.rpt 2023-10-03 15:22 8.1K
backplane_control_ila_synth_1.log 2023-10-03 15:22 218K
backplane_control_ila_utilization_synth.rpt 2023-10-03 15:22 8.4K
bulk_data_fifo_synth_1.log 2023-10-03 15:22 41K
bulk_data_fifo_utilization_synth.rpt 2023-10-03 15:22 8.0K
bulk_ila_synth_1.log 2023-10-03 15:22 225K
bulk_ila_utilization_synth.rpt 2023-10-03 15:22 8.4K
chan_crc_ila_synth_1.log 2023-10-03 15:22 226K
chan_crc_ila_utilization_synth.rpt 2023-10-03 15:22 8.5K
chan_map_ila_synth_1.log 2023-10-03 15:22 218K
chan_map_ila_utilization_synth.rpt 2023-10-03 15:22 8.4K
clk_wiz_240_synth_1.log 2023-10-03 15:22 21K
clk_wiz_240_utilization_synth.rpt 2023-10-03 15:22 7.6K
data_fifo_vio_synth_1.log 2023-10-03 15:22 769
debug_ila_ed1_synth_1.log 2023-10-03 15:22 235K
debug_ila_ed1_utilization_synth.rpt 2023-10-03 15:22 8.5K
dwidth_convert_synth_1.log 2023-10-03 15:22 31K
dwidth_convert_utilization_synth.rpt 2023-10-03 15:22 7.8K
error_ila_synth_1.log 2023-10-03 15:22 228K
error_ila_utilization_synth.rpt 2023-10-03 15:22 8.4K
ethernet_mac_rgmii_synth_1.log 2023-10-03 15:22 88K
ethernet_mac_rgmii_utilization_synth.rpt 2023-10-03 15:22 9.1K
event_builder_fifo_synth_1.log 2023-10-03 15:22 789
fifo1KB_34bit_synth_1.log 2023-10-03 15:22 49K
fifo1KB_34bit_utilization_synth.rpt 2023-10-03 15:22 8.2K
fm_status_fifo_synth_1.log 2023-10-03 15:22 50K
fm_status_fifo_utilization_synth.rpt 2023-10-03 15:22 8.2K
hierarchical_utilization.txt 2023-10-03 15:22 7.6M
ila_1_synth_1.log 2023-10-03 15:22 216K
ila_1_utilization_synth.rpt 2023-10-03 15:22 8.3K
ila_2_synth_1.log 2023-10-03 15:22 231K
ila_2_utilization_synth.rpt 2023-10-03 15:22 8.4K
ila_7series_synth_1.log 2023-10-03 15:22 216K
ila_7series_utilization_synth.rpt 2023-10-03 15:22 8.4K
ila_bulk_ttc_synth_1.log 2023-10-03 15:22 230K
ila_bulk_ttc_utilization_synth.rpt 2023-10-03 15:22 8.5K
ila_ev_builder_synth_1.log 2023-10-03 15:22 246K
ila_ev_builder_utilization_synth.rpt 2023-10-03 15:22 8.5K
ila_fifo_synth_1.log 2023-10-03 15:22 229K
ila_fifo_utilization_synth.rpt 2023-10-03 15:22 8.4K
ila_fullmode_synth_1.log 2023-10-03 15:22 229K
ila_fullmode_utilization_synth.rpt 2023-10-03 15:22 8.5K
ila_jfex_aurora_low_synth_1.log 2023-10-03 15:22 236K
ila_jfex_aurora_low_utilization_synth.rpt 2023-10-03 15:22 8.5K
ila_l1id_cont_synth_1.log 2023-10-03 15:22 230K
ila_l1id_cont_utilization_synth.rpt 2023-10-03 15:22 8.4K
ila_mgtfsm_synth_1.log 2023-10-03 15:22 223K
ila_mgtfsm_utilization_synth.rpt 2023-10-03 15:22 8.4K
ila_ttc_in_synth_1.log 2023-10-03 15:22 232K
ila_ttc_in_utilization_synth.rpt 2023-10-03 15:22 8.4K
ila_ttc_out_synth_1.log 2023-10-03 15:22 223K
ila_ttc_out_utilization_synth.rpt 2023-10-03 15:22 8.5K
ila_wconv_synth_1.log 2023-10-03 15:22 226K
ila_wconv_utilization_synth.rpt 2023-10-03 15:22 8.4K
impl_1.log 2023-10-03 15:22 378K
packet_processor_clock_synth_1.log 2023-10-03 15:22 22K
packet_processor_clock_utilization_synth.rpt 2023-10-03 15:22 7.7K
pp_ctrl_vio_synth_1.log 2023-10-03 15:22 33K
pp_ctrl_vio_utilization_synth.rpt 2023-10-03 15:22 7.9K
processor_in_fifo_synth_1.log 2023-10-03 15:22 48K
processor_in_fifo_utilization_synth.rpt 2023-10-03 15:22 8.3K
rgmii_rx_fifo_2_synth_1.log 2023-10-03 15:22 41K
rgmii_rx_fifo_2_utilization_synth.rpt 2023-10-03 15:22 8.1K
rod_RO_Tx_synth_1.log 2023-10-03 15:22 51K
rod_RO_Tx_utilization_synth.rpt 2023-10-03 15:22 8.3K
rod_ROctrl_mux_ila_synth_1.log 2023-10-03 15:22 223K
rod_ROctrl_mux_ila_utilization_synth.rpt 2023-10-03 15:22 8.4K
synth_1.log 2023-10-03 15:22 1.0M
top_rod_jfex_control_sets_placed.rpt 2023-10-03 15:22 6.5M
top_rod_jfex_drc_opted.rpt 2023-10-03 15:22 8.1K
top_rod_jfex_io_placed.rpt 2023-10-03 15:22 604K
top_rod_jfex_utilization_placed.rpt 2023-10-03 15:22 15K
top_rod_jfex_utilization_synth.rpt 2023-10-03 15:22 11K
ttc_header_fifo_synth_1.log 2023-10-03 15:22 51K
ttc_header_fifo_utilization_synth.rpt 2023-10-03 15:22 8.2K
vio_0_synth_1.log 2023-10-03 15:22 737
vio_7series_synth_1.log 2023-10-03 15:22 33K
vio_7series_utilization_synth.rpt 2023-10-03 15:22 7.8K
vio_fullmode_reset_synth_1.log 2023-10-03 15:22 33K
vio_fullmode_reset_utilization_synth.rpt 2023-10-03 15:22 7.9K
vio_ip_address_synth_1.log 2023-10-03 15:22 33K
vio_ip_address_utilization_synth.rpt 2023-10-03 15:22 7.8K
vio_top_synth_1.log 2023-10-03 15:22 33K
vio_top_utilization_synth.rpt 2023-10-03 15:22 7.8K
vio_ttc_synth_1.log 2023-10-03 15:22 32K
vio_ttc_utilization_synth.rpt 2023-10-03 15:22 7.8K