<!-- ROD Bulk processor address table -->
<!-- Defines ROD_bulk_processor register block container -->
<node fwinfo="endpoint;width=5">

    
	<node id="event_fifo_control" permission="rw"   address="0x0" description="event fifo control bits" fwinfo="endpoint;width=0">
		<node id="Busy_enable" 	mask="0x1" description="Enable action on busy threshold exceeded" />
		<node id="Xoff_enable"	mask="0x2" description="Enable action on xoff threshold exceeded" />
	</node>
		
	<node id="event_fifo_reset" permission="w"   address="0x1" description="Bulk fifo and FM reset bits(pulse reg)" fwinfo="endpoint;width=0">
		<node id="Bulk_fifo_reset" 			mask="0x1" description="Reset and purge the event fifo" />
		<node id="Bulk_busy_thresh_reset"	mask="0x2" description="Reset the Bulk busy threshold exceeded count" />
		<node id="Bulk_xoff_thresh_reset"	mask="0x4" description="Reset the Bulk xoff threshold exceeded count" />
		<node id="Bulk_watermark_reset"		mask="0x8" description="Reset the Bulk fifo watermark" />
		
		<node id="fm_watermark_reset"       mask="0x40"  description="Reset the full mode fifo watermark" />
		<node id="fm_status_reset"          mask="0x200" description="Reset the full mode status reg" />
		
	</node>	

	<node id="Bulk_fifo_fill_level"  	permission="r"  address="0x2" description="Processor fifo fill level size = 1Kx64" fwinfo="endpoint;width=0">
		<node id="Bulk_fifo_level" 			mask="0x0000FFFF" description="Bulk fifo current level" />
		<node id="Bulk_fifo_watermark" 		mask="0xFFFF0000" description="Bulk fifo watermark" />
	</node>	
	
	<node id="Bulk_proc_status"  	permission="r"  address="0x4" description="Bulk Processor Status" fwinfo="endpoint;width=0">
		<node id="Current_chan" 		    mask="0xFF" description="Channel being processed" />
		<node id="Current_state"	        mask="0xFF00" description="Processor microcode state" />
		<node id="Header_mark" 		        mask="0x10000" description="Header mark coming from input mux" />
<!--		<node id="Header_crc_error"	        mask="0x200" description="Header crc error mark from input mux" />    -->
<!--		<node id="TTC_crc_error"	        mask="0x400" description="TTC crc error mark out of fifo" />          -->
	</node>	
	
	<node id="Full_mode_control"  	permission="rw"  address="0x5" description="controls for associated full mode output" fwinfo="endpoint;width=0">
		<node id="Soft_reset" 				mask="0x1" description="soft reset the interface - must be set back to zero" />
		<node id="Enable_playout" 			mask="0x2" description="turn on playout memory" />
		<node id="Set_busy" 			    mask="0x4" description="set busy output" />	
		<node id="LEMO" 	  		    	mask="0x8" description="set LEMO output" />	
		<node id="flx_bp_enable" 	  		mask="0x10" description="enable felix backpressure" />	
		<node id="flx_bp_select" 	  		mask="0xf00" description="select felix backpressure signal for this output" />
		<node id="error_reset" 	  		    mask="0x1000" 	description="clear_error_stat - must be set to 1 then 0" />
	</node>	
	
	<node id="Full_mode_status"  	permission="r"  address="0x6" description="status of associated full mode output" fwinfo="endpoint;width=0">
		<node id="QPLL_lock" 	   			mask="0x1" description="QPLL is locked" />
		<node id="MGT_reset_done" 		    mask="0x2" description="Reset is done" />
		<node id="Fifo_full" 				mask="0x4" description="sticky bit that needs a reset" />
		<node id="duplicate_word_error" 	mask="0x8" 	description="duplicate first word detected" />
		<node id="Fifo_fill_level" 			mask="0xFF0000" description="FM tx fifo fill level" />
		<node id="packet_meter" 	        mask="0xFF000000" description="rolling packet counter" />
	</node>	
	
    <node id="Full_mode_L1ID"  	permission="r"  address="0x7" description="status of associated full mode output" fwinfo="endpoint;width=0"/>	
	
	
	<node id="Stage_fifo_level"  	permission="r"  address="0x8" description="Bulk Staging fifo fill level in 64-bit words - size = 4Kx64 bits" fwinfo="endpoint;width=0">
		<node id="Stage_fifo_level" 		mask="0x0000FFFF" description="Staging fifo current level in 64-bit words max=4K" />
		<node id="Stage_fifo_watermark" 	mask="0xFFFF0000" description="Staging fifo watermark level in 64-bit words max=4K" />
	</node>	
	
	<node id="Full_mode_fifo_level"  	permission="r"  address="0x9" description="Small FIFO in FM interface 1Kx32 bits" fwinfo="endpoint;width=0">
		<node id="FM_fifo_level" 		mask="0x0000FFFF" description="Full Mode Tx fifo current level in 32-bit words" />
		<node id="FM_fifo_watermark" 	mask="0xFFFF0000" description="Full Mode Tx fifo watermark in 32-bit words" />
	</node>	
	
	<!--   <Bulk Staging FIFO Status and Control>  -->
	<node id="Bulk_staging_fifo_thresholds" permission="rw"   address="0xA" description="Bulk staging fifo busy thresholds" fwinfo="endpoint;width=0">
		<node id="Busy_threshold" 	mask="0x0000FFFF" description="Enable action on busy threshold exceeded" />
		<node id="Xoff_threshold"	mask="0xFFFF0000" description="Enable action on xoff threshold exceeded" />
		</node>
		
	<node id="Bulk_staging_fifo_control" permission="rw"   address="0xB" description="Bulk fifo control bits" fwinfo="endpoint;width=0">
		<node id="Busy_enable" 	mask="0x1" description="Enable action on busy threshold exceeded" />
		<node id="Xoff_enable"	mask="0x2" description="Enable action on xoff threshold exceeded" />
		</node>	
		
	<node id="Bulk_staging_fifo_resets" permission="rw"   address="0xC" description="Bulk staging fifo reset bits(pulse reg)" fwinfo="endpoint;width=0">
		<node id="stage_fifo_reset" 	    mask="0x1" description="Reset and purge the tob fifo" />
		<node id="stage_watermark_reset"    mask="0x2" description="Reset the stage fifo watermark" />
		<node id="stage_busy_thresh_reset"	mask="0x4" description="Reset the tob busy threshold exceeded count" />
		<node id="stage_xoff_thresh_reset"	mask="0x8" description="Reset the tob xoff threshold exceeded count" />
		<node id="Flx_bp_time_reset" 	  	mask="0x10" description="Reset felix backpressure time counter" />
		</node>	
		
	<node id="Bulk_staging_fifo_status" permission="r"   address="0xD" description="Bulk fifo status bits" fwinfo="endpoint;width=0">
		<node id="stage_fifo_full" mask="0x1" description="TOB fifo is currently overrun" />
		<node id="stage_fifo_busy"	mask="0x2" description="TOB fifo level is currently above the busy threshold" />
		<node id="stage_fifo_xoff"	mask="0x4" description="TOB fifo level is currently above the xoff threshold" />
	</node>	
				
	
	<node id="Bulk_staging_fifo_busy_Count"  	permission="r"  address="0xE" description="Bulk Staging FIFO Busy Threshold Exceeded Counter" fwinfo="endpoint;width=0"/>
    <node id="Bulk_staging_fifo_xoff_Count"  	permission="r"  address="0xF" description="Bulk Staging FIFO Busy Threshold Exceeded Counter" fwinfo="endpoint;width=0"/>
	
	<node id="Felix_backpressure_time"        	permission="r"  address="0x3" description="Felix Back Pressure Active Time Counter" fwinfo="endpoint;width=0"/>
	
	<node id="pkt_capture_regs" address="0x10" description="registers for all channels" module="file://L1CaloHubRodPktCaptureRegisters.xml"/>

</node>
