<?xml version="1.0" ?>

<!-- Automatically generated IPBus address table file from address_table_generator python script version 1.00.
Generated on 23-Apr-2019 15:53 -->

<node>
	<node id="GIE" address="0x001C" description="Global interrupt enable register" permission="rw" fwinfo="endpoint;width=0">
		<node id="GIE" mask="0x80000000" description="Global interrupt enable bit"/>
	</node>
	<node id="ISR" address="0x0020" description="Interrupt status register" permission="rw" fwinfo="endpoint;width=0">
		<node id="ARB_LOST" mask="0x1" description="Arbitration lost"/>
		<node id="TX_STATUS" mask="0x2" description="Transmit error/slave transmit complete"/>
		<node id="TX_FIFO_EMPTY" mask="0x4" description="Transmit FIFO empty"/>
		<node id="RX_FIFO_FULL" mask="0x8" description="Receive FIFO full"/>
		<node id="BUS_NOT_BUSY" mask="0x10" description="I2C bus not busy"/>
		<node id="AAS" mask="0x20" description="Addressed as slave"/>
		<node id="NAAS" mask="0x40" description="Not addressed as slave"/>
		<node id="TX_FIFO_HALF_EMPTY" mask="0x80" description="Transmit FIFO half empty"/>
	</node>
	<node id="IER" address="0x0028" description="Interrupt enable register" permission="rw" fwinfo="endpoint;width=0">
		<node id="ARB_LOST" mask="0x1" description="Arbitration lost"/>
		<node id="TX_STATUS" mask="0x2" description="Transmit error/slave transmit complete"/>
		<node id="TX_FIFO_EMPTY" mask="0x4" description="Transmit FIFO empty"/>
		<node id="RX_FIFO_FULL" mask="0x8" description="Receive FIFO full"/>
		<node id="BUS_NOT_BUSY" mask="0x10" description="I2C bus not busy"/>
		<node id="AAS" mask="0x20" description="Addressed as slave"/>
		<node id="NAAS" mask="0x40" description="Not addressed as slave"/>
		<node id="TX_FIFO_HALF_EMPTY" mask="0x80" description="Transmit FIFO half empty"/>
	</node>
	<node id="SOFTR" address="0x0040" description="Soft reset register" mode="single" permission="w" fwinfo="endpoint;width=0"/>
	<node id="CR" address="0x0100" description="Control register" permission="rw" fwinfo="endpoint;width=0">
		<node id="EN" mask="0x1" description="AXI I2C enable"/>
		<node id="TX_FIFO_RESET" mask="0x2" description="Transmit FIFO reset"/>
		<node id="MSMS" mask="0x4" description="Master/slave mode select"/>
		<node id="TX" mask="0x8" description="Transmit/receive mode select"/>
		<node id="TXAK" mask="0x10" description="Transmit acknowledge enable"/>
		<node id="RSTA" mask="0x20" description="Repeated start"/>
		<node id="GC_EN" mask="0x40" description="General call enable"/>
	</node>
	<node id="SR" address="0x0104" description="Status register" permission="r" fwinfo="endpoint;width=0">
		<node id="ABGC" mask="0x1" description="Adressed by a general call"/>
		<node id="AAS" mask="0x2" description="Addressed as slave"/>
		<node id="BB" mask="0x4" description="Bus busy"/>
		<node id="SRW" mask="0x8" description=" Slave read/write"/>
		<node id="TX_FIFO_FULL" mask="0x10" description="Transmit FIFO full"/>
		<node id="RX_FIFO_FULL" mask="0x20" description="Receive FIFO full"/>
		<node id="RX_FIFO_EMPTY" mask="0x40" description="Receive FIFO empty"/>
		<node id="TX_FIFO_EMPTY" mask="0x80" description="Transmit FIFO empty"/>
	</node>
	<node id="TX_FIFO" address="0x0108" description="Transmit FIFO register" permission="rw" fwinfo="endpoint;width=0">
		<node id="DATA" mask="0xFF" description=" FIFO data"/>
		<node id="START" mask="0x100" description="TX dynamic start bit"/>
		<node id="STOP" mask="0x200" description="TX dynamic stop bit"/>
	</node>
	<node id="RX_FIFO" address="0x010C" description="Receive FIFO register" mode="single" permission="r" fwinfo="endpoint;width=0"/>
	<node id="ADR" address="0x0110" description="Slave address register" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="TX_FIFO_OCY" address="0x0114" description="Transmit FIFO occupancy register" mode="single" permission="r" fwinfo="endpoint;width=0"/>
	<node id="RX_FIFO_OCY" address="0x0118" description="Receive FIFO occupancy register" mode="single" permission="r" fwinfo="endpoint;width=0"/>
	<node id="TEN_ADR" address="0x011C" description="Slave ten bit address register" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="RX_FIFO_PIRQ" address="0x0120" description="Receive FIFO pogrammable depth interrupt register" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="GPO" address="0x0124" description="General purpose output register" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="TSUSTA" address="0x0128" description="Setup time for a repeated START condition" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="TSUSTO" address="0x012C" description="Setup time for a repeated STOP condition" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="THDSTA" address="0x0130" description="Hold time for a repeated START condition" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="TSUDAT" address="0x0134" description="Data setup time" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="TBUF" address="0x0138" description="Bus free time between a STOP and START condition" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="THIGH" address="0x013C" description="High period of the scl clock" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="TLOW" address="0x0140" description="Data hold time" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
	<node id="THDDAT" address="0x0144" description="Timing parameter register" mode="single" permission="rw" fwinfo="endpoint;width=0"/>
</node>
