Index of /efex/firmware/ROD/official/v1.0.5/rod_efex_p2-v1.0.5/reports
Name Last modified Size Description
Parent Directory -
top_rod_efex_p2_route_status.rpt 2025-01-03 18:12 651
vio_0_synth_1.log 2025-01-03 18:12 2.8K
event_builder_fifo_synth_1.log 2025-01-03 18:13 3.0K
clk_wiz_240_utilization_synth.rpt 2025-01-03 18:13 7.8K
DPram_32b_utilization_synth.rpt 2025-01-03 18:13 7.8K
packet_processor_clock_utilization_synth.rpt 2025-01-03 18:12 7.8K
axis_dwidth_64_32_utilization_synth.rpt 2025-01-03 18:13 7.9K
vio_top_utilization_synth.rpt 2025-01-03 18:12 8.0K
vio_ttc_utilization_synth.rpt 2025-01-03 18:12 8.0K
vio_ip_address_utilization_synth.rpt 2025-01-03 18:12 8.0K
vio_fullmode_reset_utilization_synth.rpt 2025-01-03 18:12 8.0K
bulk_data_fifo_utilization_synth.rpt 2025-01-03 18:13 8.2K
axis_input_fifo_utilization_synth.rpt 2025-01-03 18:13 8.2K
rgmii_rx_fifo_2_utilization_synth.rpt 2025-01-03 18:12 8.2K
axis_data_fifo_0_utilization_synth.rpt 2025-01-03 18:13 8.3K
aurora_in_fifo_utilization_synth.rpt 2025-01-03 18:13 8.3K
fm_status_fifo_utilization_synth.rpt 2025-01-03 18:13 8.4K
ttc_header_fifo_utilization_synth.rpt 2025-01-03 18:12 8.4K
fifo1KB_34bit_utilization_synth.rpt 2025-01-03 18:13 8.4K
processor_in_fifo_utilization_synth.rpt 2025-01-03 18:12 8.5K
rod_RO_Tx_utilization_synth.rpt 2025-01-03 18:12 8.5K
aurora_rx_1q_utilization_synth.rpt 2025-01-03 18:13 8.5K
aurora_rx_4l_64b_utilization_synth.rpt 2025-01-03 18:13 8.5K
MGT_combined_ttc_rx_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_1_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_fifo_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_mgtfsm_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_l1id_cont_utilization_synth.rpt 2025-01-03 18:13 8.5K
rod_ROctrl_mux_ila_utilization_synth.rpt 2025-01-03 18:12 8.5K
ila_2_utilization_synth.rpt 2025-01-03 18:13 8.6K
ila_ttc_in_utilization_synth.rpt 2025-01-03 18:12 8.6K
ila_ttc_out_utilization_synth.rpt 2025-01-03 18:12 8.6K
chan_crc_ila_utilization_synth.rpt 2025-01-03 18:13 8.6K
ila_fullmode_utilization_synth.rpt 2025-01-03 18:13 8.6K
ila_ev_builder_utilization_synth.rpt 2025-01-03 18:13 8.6K
ethernet_mac_rgmii_utilization_synth.rpt 2025-01-03 18:13 9.3K
top_rod_efex_p2_utilization_synth.rpt 2025-01-03 18:12 11K
route_report_utilization_0.rpt 2025-01-03 18:12 15K
top_rod_efex_p2_utilization_placed.rpt 2025-01-03 18:12 15K
clk_wiz_240_synth_1.log 2025-01-03 18:13 21K
packet_processor_clock_synth_1.log 2025-01-03 18:12 22K
vio_ttc_synth_1.log 2025-01-03 18:12 32K
axis_dwidth_64_32_synth_1.log 2025-01-03 18:13 33K
vio_ip_address_synth_1.log 2025-01-03 18:12 33K
vio_top_synth_1.log 2025-01-03 18:12 33K
vio_fullmode_reset_synth_1.log 2025-01-03 18:12 34K
DPram_32b_synth_1.log 2025-01-03 18:13 35K
top_rod_efex_p2_power_routed.rpt 2025-01-03 18:12 36K
bulk_data_fifo_synth_1.log 2025-01-03 18:13 41K
top_rod_efex_p2_drc_opted.rpt 2025-01-03 18:12 41K
rgmii_rx_fifo_2_synth_1.log 2025-01-03 18:12 42K
top_rod_efex_p2_drc_routed.rpt 2025-01-03 18:12 47K
axis_data_fifo_0_synth_1.log 2025-01-03 18:13 47K
processor_in_fifo_synth_1.log 2025-01-03 18:12 48K
axis_input_fifo_synth_1.log 2025-01-03 18:13 49K
fifo1KB_34bit_synth_1.log 2025-01-03 18:13 50K
fm_status_fifo_synth_1.log 2025-01-03 18:13 50K
rod_RO_Tx_synth_1.log 2025-01-03 18:12 52K
ttc_header_fifo_synth_1.log 2025-01-03 18:12 52K
aurora_in_fifo_synth_1.log 2025-01-03 18:13 53K
MGT_combined_ttc_rx_synth_1.log 2025-01-03 18:13 63K
ethernet_mac_rgmii_synth_1.log 2025-01-03 18:13 89K
aurora_rx_1q_synth_1.log 2025-01-03 18:13 131K
aurora_rx_4l_64b_synth_1.log 2025-01-03 18:13 136K
ila_1_synth_1.log 2025-01-03 18:13 237K
ila_mgtfsm_synth_1.log 2025-01-03 18:13 243K
ila_ttc_out_synth_1.log 2025-01-03 18:12 244K
rod_ROctrl_mux_ila_synth_1.log 2025-01-03 18:12 247K
chan_crc_ila_synth_1.log 2025-01-03 18:13 248K
ila_l1id_cont_synth_1.log 2025-01-03 18:13 251K
ila_2_synth_1.log 2025-01-03 18:13 251K
ila_fifo_synth_1.log 2025-01-03 18:13 252K
ila_fullmode_synth_1.log 2025-01-03 18:13 253K
ila_ttc_in_synth_1.log 2025-01-03 18:12 253K
ila_ev_builder_synth_1.log 2025-01-03 18:13 269K
top_rod_efex_p2_clock_utilization_routed.rpt 2025-01-03 18:12 277K
impl_1.log 2025-01-03 18:12 495K
top_rod_efex_p2_methodology_drc_routed.rpt 2025-01-03 18:12 558K
top_rod_efex_p2_io_placed.rpt 2025-01-03 18:12 608K
top_rod_efex_p2_timing_summary_routed_1.rpt 2025-01-03 18:12 1.0M
synth_1.log 2025-01-03 18:12 1.1M
top_rod_efex_p2_bus_skew_routed.rpt 2025-01-03 18:12 2.1M
hierarchical_utilization.txt 2025-01-03 18:13 4.1M
top_rod_efex_p2_control_sets_placed.rpt 2025-01-03 18:12 4.2M
top_rod_efex_p2_timing_summary_routed.rpt 2025-01-03 18:12 32M