-- Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2020.2 (lin64) Build 3064766 Wed Nov 18 09:12:47 MST 2020
-- Date        : Sat Mar  8 22:13:41 2025
-- Host        : atlas-tdaq-firmware-dev.cern.ch running 64-bit AlmaLinux 9.5 (Teal Serval)
-- Command     : write_vhdl -force -mode synth_stub
--               /fast/gitlab-runner-home/builds/t3_BwBuQ-/0/atlas-l1calo-efex/eFEXFirmware/IP/Infrastructure_control/efex_aurora_hub2/efex_aurora_hub2_stub.vhdl
-- Design      : efex_aurora_hub2
-- Purpose     : Stub declaration of top-level module interface
-- Device      : xc7vx330tffg1157-2
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity efex_aurora_hub2 is
  Port ( 
    s_axi_tx_tdata : in STD_LOGIC_VECTOR ( 63 downto 0 );
    s_axi_tx_tvalid : in STD_LOGIC;
    s_axi_tx_tready : out STD_LOGIC;
    s_axi_tx_tkeep : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_tx_tlast : in STD_LOGIC;
    s_axi_ufc_tx_tvalid : in STD_LOGIC;
    s_axi_ufc_tx_tdata : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_ufc_tx_tready : out STD_LOGIC;
    txp : out STD_LOGIC_VECTOR ( 0 to 3 );
    txn : out STD_LOGIC_VECTOR ( 0 to 3 );
    gt_refclk1 : in STD_LOGIC;
    tx_hard_err : out STD_LOGIC;
    tx_lane_up : out STD_LOGIC_VECTOR ( 0 to 3 );
    tx_channel_up : out STD_LOGIC;
    user_clk : in STD_LOGIC;
    sync_clk : in STD_LOGIC;
    tx_system_reset : in STD_LOGIC;
    power_down : in STD_LOGIC;
    loopback : in STD_LOGIC_VECTOR ( 2 downto 0 );
    gt_reset : in STD_LOGIC;
    tx_lock : out STD_LOGIC;
    sys_reset_out : out STD_LOGIC;
    init_clk_in : in STD_LOGIC;
    tx_resetdone_out : out STD_LOGIC;
    drpclk_in : in STD_LOGIC;
    drpaddr_in : in STD_LOGIC_VECTOR ( 8 downto 0 );
    drpdi_in : in STD_LOGIC_VECTOR ( 15 downto 0 );
    drpdo_out : out STD_LOGIC_VECTOR ( 15 downto 0 );
    drpen_in : in STD_LOGIC;
    drprdy_out : out STD_LOGIC;
    drpwe_in : in STD_LOGIC;
    drpaddr_in_lane1 : in STD_LOGIC_VECTOR ( 8 downto 0 );
    drpdi_in_lane1 : in STD_LOGIC_VECTOR ( 15 downto 0 );
    drpdo_out_lane1 : out STD_LOGIC_VECTOR ( 15 downto 0 );
    drpen_in_lane1 : in STD_LOGIC;
    drprdy_out_lane1 : out STD_LOGIC;
    drpwe_in_lane1 : in STD_LOGIC;
    drpaddr_in_lane2 : in STD_LOGIC_VECTOR ( 8 downto 0 );
    drpdi_in_lane2 : in STD_LOGIC_VECTOR ( 15 downto 0 );
    drpdo_out_lane2 : out STD_LOGIC_VECTOR ( 15 downto 0 );
    drpen_in_lane2 : in STD_LOGIC;
    drprdy_out_lane2 : out STD_LOGIC;
    drpwe_in_lane2 : in STD_LOGIC;
    drpaddr_in_lane3 : in STD_LOGIC_VECTOR ( 8 downto 0 );
    drpdi_in_lane3 : in STD_LOGIC_VECTOR ( 15 downto 0 );
    drpdo_out_lane3 : out STD_LOGIC_VECTOR ( 15 downto 0 );
    drpen_in_lane3 : in STD_LOGIC;
    drprdy_out_lane3 : out STD_LOGIC;
    drpwe_in_lane3 : in STD_LOGIC;
    gt0_cplllock_out : out STD_LOGIC;
    gt0_txpostcursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt0_txprecursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt0_txchardispmode_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt0_txchardispval_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt0_txdiffctrl_in : in STD_LOGIC_VECTOR ( 3 downto 0 );
    gt0_txmaincursor_in : in STD_LOGIC_VECTOR ( 6 downto 0 );
    gt0_txpolarity_in : in STD_LOGIC;
    gt0_tx_buf_err_out : out STD_LOGIC;
    gt0_txprbsforceerr_in : in STD_LOGIC;
    gt0_txprbssel_in : in STD_LOGIC_VECTOR ( 2 downto 0 );
    gt0_txpcsreset_in : in STD_LOGIC;
    gt0_txinhibit_in : in STD_LOGIC;
    gt0_txpmareset_in : in STD_LOGIC;
    gt0_txresetdone_out : out STD_LOGIC;
    gt0_txbufstatus_out : out STD_LOGIC_VECTOR ( 1 downto 0 );
    gt1_cplllock_out : out STD_LOGIC;
    gt1_txpostcursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt1_txprecursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt1_txchardispmode_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt1_txchardispval_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt1_txdiffctrl_in : in STD_LOGIC_VECTOR ( 3 downto 0 );
    gt1_txmaincursor_in : in STD_LOGIC_VECTOR ( 6 downto 0 );
    gt1_txpolarity_in : in STD_LOGIC;
    gt1_tx_buf_err_out : out STD_LOGIC;
    gt1_txprbsforceerr_in : in STD_LOGIC;
    gt1_txprbssel_in : in STD_LOGIC_VECTOR ( 2 downto 0 );
    gt1_txpcsreset_in : in STD_LOGIC;
    gt1_txinhibit_in : in STD_LOGIC;
    gt1_txpmareset_in : in STD_LOGIC;
    gt1_txresetdone_out : out STD_LOGIC;
    gt1_txbufstatus_out : out STD_LOGIC_VECTOR ( 1 downto 0 );
    gt2_cplllock_out : out STD_LOGIC;
    gt2_txpostcursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt2_txprecursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt2_txchardispmode_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt2_txchardispval_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt2_txdiffctrl_in : in STD_LOGIC_VECTOR ( 3 downto 0 );
    gt2_txmaincursor_in : in STD_LOGIC_VECTOR ( 6 downto 0 );
    gt2_txpolarity_in : in STD_LOGIC;
    gt2_tx_buf_err_out : out STD_LOGIC;
    gt2_txprbsforceerr_in : in STD_LOGIC;
    gt2_txprbssel_in : in STD_LOGIC_VECTOR ( 2 downto 0 );
    gt2_txpcsreset_in : in STD_LOGIC;
    gt2_txinhibit_in : in STD_LOGIC;
    gt2_txpmareset_in : in STD_LOGIC;
    gt2_txresetdone_out : out STD_LOGIC;
    gt2_txbufstatus_out : out STD_LOGIC_VECTOR ( 1 downto 0 );
    gt3_cplllock_out : out STD_LOGIC;
    gt3_txpostcursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt3_txprecursor_in : in STD_LOGIC_VECTOR ( 4 downto 0 );
    gt3_txchardispmode_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt3_txchardispval_in : in STD_LOGIC_VECTOR ( 1 downto 0 );
    gt3_txdiffctrl_in : in STD_LOGIC_VECTOR ( 3 downto 0 );
    gt3_txmaincursor_in : in STD_LOGIC_VECTOR ( 6 downto 0 );
    gt3_txpolarity_in : in STD_LOGIC;
    gt3_tx_buf_err_out : out STD_LOGIC;
    gt3_txprbsforceerr_in : in STD_LOGIC;
    gt3_txprbssel_in : in STD_LOGIC_VECTOR ( 2 downto 0 );
    gt3_txpcsreset_in : in STD_LOGIC;
    gt3_txinhibit_in : in STD_LOGIC;
    gt3_txpmareset_in : in STD_LOGIC;
    gt3_txresetdone_out : out STD_LOGIC;
    gt3_txbufstatus_out : out STD_LOGIC_VECTOR ( 1 downto 0 );
    gt0_qplllock_in : in STD_LOGIC;
    gt0_qpllrefclklost_in : in STD_LOGIC;
    gt0_qpllreset_out : out STD_LOGIC;
    gt_qpllclk_quad5_in : in STD_LOGIC;
    gt_qpllrefclk_quad5_in : in STD_LOGIC;
    tx_out_clk : out STD_LOGIC;
    pll_not_locked : in STD_LOGIC
  );

end efex_aurora_hub2;

architecture stub of efex_aurora_hub2 is
attribute syn_black_box : boolean;
attribute black_box_pad_pin : string;
attribute syn_black_box of stub : architecture is true;
attribute black_box_pad_pin of stub : architecture is "s_axi_tx_tdata[63:0],s_axi_tx_tvalid,s_axi_tx_tready,s_axi_tx_tkeep[7:0],s_axi_tx_tlast,s_axi_ufc_tx_tvalid,s_axi_ufc_tx_tdata[2:0],s_axi_ufc_tx_tready,txp[0:3],txn[0:3],gt_refclk1,tx_hard_err,tx_lane_up[0:3],tx_channel_up,user_clk,sync_clk,tx_system_reset,power_down,loopback[2:0],gt_reset,tx_lock,sys_reset_out,init_clk_in,tx_resetdone_out,drpclk_in,drpaddr_in[8:0],drpdi_in[15:0],drpdo_out[15:0],drpen_in,drprdy_out,drpwe_in,drpaddr_in_lane1[8:0],drpdi_in_lane1[15:0],drpdo_out_lane1[15:0],drpen_in_lane1,drprdy_out_lane1,drpwe_in_lane1,drpaddr_in_lane2[8:0],drpdi_in_lane2[15:0],drpdo_out_lane2[15:0],drpen_in_lane2,drprdy_out_lane2,drpwe_in_lane2,drpaddr_in_lane3[8:0],drpdi_in_lane3[15:0],drpdo_out_lane3[15:0],drpen_in_lane3,drprdy_out_lane3,drpwe_in_lane3,gt0_cplllock_out,gt0_txpostcursor_in[4:0],gt0_txprecursor_in[4:0],gt0_txchardispmode_in[1:0],gt0_txchardispval_in[1:0],gt0_txdiffctrl_in[3:0],gt0_txmaincursor_in[6:0],gt0_txpolarity_in,gt0_tx_buf_err_out,gt0_txprbsforceerr_in,gt0_txprbssel_in[2:0],gt0_txpcsreset_in,gt0_txinhibit_in,gt0_txpmareset_in,gt0_txresetdone_out,gt0_txbufstatus_out[1:0],gt1_cplllock_out,gt1_txpostcursor_in[4:0],gt1_txprecursor_in[4:0],gt1_txchardispmode_in[1:0],gt1_txchardispval_in[1:0],gt1_txdiffctrl_in[3:0],gt1_txmaincursor_in[6:0],gt1_txpolarity_in,gt1_tx_buf_err_out,gt1_txprbsforceerr_in,gt1_txprbssel_in[2:0],gt1_txpcsreset_in,gt1_txinhibit_in,gt1_txpmareset_in,gt1_txresetdone_out,gt1_txbufstatus_out[1:0],gt2_cplllock_out,gt2_txpostcursor_in[4:0],gt2_txprecursor_in[4:0],gt2_txchardispmode_in[1:0],gt2_txchardispval_in[1:0],gt2_txdiffctrl_in[3:0],gt2_txmaincursor_in[6:0],gt2_txpolarity_in,gt2_tx_buf_err_out,gt2_txprbsforceerr_in,gt2_txprbssel_in[2:0],gt2_txpcsreset_in,gt2_txinhibit_in,gt2_txpmareset_in,gt2_txresetdone_out,gt2_txbufstatus_out[1:0],gt3_cplllock_out,gt3_txpostcursor_in[4:0],gt3_txprecursor_in[4:0],gt3_txchardispmode_in[1:0],gt3_txchardispval_in[1:0],gt3_txdiffctrl_in[3:0],gt3_txmaincursor_in[6:0],gt3_txpolarity_in,gt3_tx_buf_err_out,gt3_txprbsforceerr_in,gt3_txprbssel_in[2:0],gt3_txpcsreset_in,gt3_txinhibit_in,gt3_txpmareset_in,gt3_txresetdone_out,gt3_txbufstatus_out[1:0],gt0_qplllock_in,gt0_qpllrefclklost_in,gt0_qpllreset_out,gt_qpllclk_quad5_in,gt_qpllrefclk_quad5_in,tx_out_clk,pll_not_locked";
begin
end;
