<!-- MGT Quad address table -->
<!-- Defines MGT_QUAD container with common Quad registers, then four Channel containers each with the same registers -->
<!-- version: 1.1.0     sha: 15F9CE5 -->

<node fwinfo="endpoint;width=11">

  <node id="quad" address="0x0" description="MGT Quad Registers" tags= "slave">
    
    <node id="mgt_control"  permission="rw"  address="0x0" description="MGT Control register" fwinfo="endpoint;width=0">
      <node id="loopback"  		mask="0xf" description="Enable loopback"/>
      <node id="enable_gt0" 		mask="0x10" description="Enable MGT 0"/>
      <node id="enable_gt1" 		mask="0x20" description="Enable MGT 1"/>
      <node id="enable_gt2" 		mask="0x40" description="Enable MGT 2"/>
      <node id="enable_gt3" 		mask="0x80" description="Enable MGT 3"/>
      <node id="rdy_gt0" 		mask="0x100" description="Ready for gt0 data"/>
      <node id="rdy_gt1" 		mask="0x200" description="Ready for gt1 data"/>
      <node id="rdy_gt2" 		mask="0x400" description="Ready for gt2 data"/>
      <node id="rdy_gt3" 		mask="0x800" description="Ready for gt3 data"/>
      <node id="data_ram_enable_gt0"  mask="0x1000" description="Data RAM enable for gt0 data"/>
      <node id="data_ram_enable_gt1"  mask="0x2000" description="Data RAM enable for gt1 data"/>
      <node id="data_ram_enable_gt2"  mask="0x4000" description="Data RAM enable for gt2 data"/>
      <node id="data_ram_enable_gt3"  mask="0x8000" description="Data RAM enable for gt3 data"/>			
    </node>
    
    <node id="synch_control"  permission="rw" address="0x1" description="MGT Synchronisation Control" fwinfo="endpoint;width=0">
      <node id="bc_reg_sel_gt0" 	mask="0xf" description="Set BC mux of GT0" />
      <node id="bc_reg_sel_gt1" 	mask="0xf0" description="Set BC mux of GT1" />
      <node id="bc_reg_sel_gt2" 	mask="0xf00" description="Set BC mux of GT2" />
      <node id="bc_reg_sel_gt3" 	mask="0xf000" description="Set BC mux of GT3" />
      <node id="mux_sel_gt0" 		mask="0xF0000" description="Mux sel stage 1 of GT0" />
      <node id="mux_sel_gt1" 		mask="0xF00000" description="Mux sel stage 1 of GT1" />
      <node id="mux_sel_gt2" 		mask="0xF000000" description="Mux sel stage 1 of GT2" />
      <node id="mux_sel_gt3" 		mask="0xF0000000" description="Mux sel stage 1 of GT3" />
    </node>
    
    <node id="mgt_pulse"  permission="rw"   address="0x2" description="MGT Pulse Register" fwinfo="endpoint;width=0">
      <node id="softreset_tx" 	mask="0x1" description="Reset MGT Transmitter" />
      <node id="softreset_rx" 	mask="0x2" description="Reset MGT Receiver" />
      <node id="error_counter_reset" 	mask="0x4" description="Reset Error Counters" />
    </node>
    
    <node id="mgt_status"  permission="r"  address="0x3" description="MGT Status Register" fwinfo="endpoint;width=0">
      <node id="qpll_lock" 		mask="0x1" description="Set if qpll is locked" />
      <node id="qpll_refclklost" 	mask="0x2" description="Set if Reference Clock is lost" />
    </node>
    
    <node id="phase_control"  permission="rw" address="0x4" description="tob data phase shift Control" fwinfo="endpoint;width=0">
      <node id="phase_sel_gt0" 	mask="0xf" description="Set phase mux of GT0" />
      <node id="phase_sel_gt1" 	mask="0xf0" description="Set phase mux of GT1" />
      <node id="phase_sel_gt2" 	mask="0xf00" description="Set phase mux of GT2" />
      <node id="phase_sel_gt3" 	mask="0xf000" description="Set phase mux of GT3" />
    </node >
  </node >
  <node id="gt0" address="0x100" description="GT0 Channel" module="file://efex_mgt_channel.xml"/>
  <node id="gt1" address="0x200" description="GT1 Channel" module="file://efex_mgt_channel.xml"/>
  <node id="gt2" address="0x300" description="GT2 Channel" module="file://efex_mgt_channel.xml"/>
  <node id="gt3" address="0x400" description="GT3 Channel" module="file://efex_mgt_channel.xml"/>
</node>
