## Repository info
- Merge request number: 286
- Branch name: feature-cfpga-tweaks

## MR Description
Fixes for incomplete zero suppression and merging timeouts


## Changelog


## efex_control Version Table
| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | e3f3bfe        | 1.1.3       |
| Constraints                 | 8080fc5a       | 0.17.0      |
| IPbus XML                   | df21a4d        | 1.1.2       |
| Top Directory               | d88faa0        | 0.15.0      |
| Hog                         | c3aa34c        | 6.17.4      |
| **Lib:** infrastructure_lib | e3f3bfe        | 1.1.3       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |



## efex_control Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.139178       |
| TNS:          | 0.000000       |
| WHS:          | 0.051839       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_control Synthesis Utilization report
                                                                                      
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |    
| ---    |         ---  |        --- |         ---  |             ---  |              
| Slice  LUTs*     |    21894    |   0         |    204000        |    10.73     |    
| Slice  Registers |    30973    |   0         |    408000        |    7.59      |    
| Block  RAM       Tile |        282 |         0    |             750  |         37.60
| DSPs   |         0    |        0   |         1120 |             0.00 |              
| Bonded IOB       |    282      |   0         |    600           |    47.00     |    
                                                                                      
## efex_control Implementation Utilization report
                                                                                        
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |    
| ---    |         ---  |        ---   |         ---  |             ---  |              
| Slice  LUTs      |    27767    |     0         |    204000        |    13.61     |    
| Slice  Registers |    46342    |     0         |    408000        |    11.36     |    
| Block  RAM       Tile |        308.5 |         0    |             750  |         41.13
| DSPs   |         0    |        0     |         1120 |             0.00 |              
| Bonded IOB       |    250      |     238       |    600           |    41.67     |