<!-- efex_tob_readout -->
<!-- Defines TOB Readout registers  -->
<!-- version: 1.1.1     sha: 15F9CE5 -->

<node fwinfo="endpoint;width=13">   
  <node id="l1a_counter"         address="0x0"  permission="r"  fwinfo="endpoint;width=0" description="L1A_ID Extended and L1A_ID of Counter">
    <node id="l1a_id_counter"     mask="0x00FFFFFF"  description="L1A_ID 24 bit"/>
    <node id="l1a_id_extended"    mask="0xFF000000"  description="L1A_ID Extended 8 bit"/>
  </node>
  
  <node id="bcn"                              address="0x1"  permission="r"  fwinfo="endpoint;width=0" description="Bunch Crossing number"/>
  
  <node id="tob_wr_addr_offset_reg"           address="0x2"  permission="rw"  fwinfo="endpoint;width=0" description="Write address offset for TOB memory"/>
  <node id="xtob_eg_wr_addr_offset_reg"       address="0x3"  permission="rw"  fwinfo="endpoint;width=0" description="Write address offset for e/g XTOB memory"/>
  <node id="xtob_tau_wr_addr_offset_reg"      address="0x4"  permission="rw"  fwinfo="endpoint;width=0" description="Write address offset for Tau XTOB memory"/>
  <node id="tob_slices_to_rd"                 address="0x5"  permission="rw"  fwinfo="endpoint;width=0" description="Number of slices to read for TOB/XTOB"/>
  <node id="tob_fifo_prog_full_thresh_assert" address="0x6"  permission="rw"  fwinfo="endpoint;width=0" description="TOB FIFO prog Full assertion threshold"/>
  <node id="tob_fifo_prog_full_thresh_negate" address="0x7"  permission="rw"  fwinfo="endpoint;width=0" description="TOB FIFO prog Full negation threshold"/> 
  <node id="tob_fifo_data_count"              address="0x8"  permission="r"   fwinfo="endpoint;width=0" description="Number of words in TOB FIFO"/>
  <node id="l1a_id_event"                     address="0x9"  permission="r"   fwinfo="endpoint;width=0" description="L1A_ID Extended and L1A_ID of current event">
    <node id="l1a_id_event"                    mask="0x00FFFFFF"  description="L1A_ID 24 bit"/>
    <node id="l1a_id_extended_event"           mask="0xFF000000"  description="L1A_ID Extended 8 bit"/>
  </node>
  <node id="trigger_slice"                    address="0xa"  permission="rw"  fwinfo="endpoint;width=0" description="trigger slice number (on L1A) "/>
  <node id="bcn_fifo_tob_rd_data_count"       address="0xb"  permission="r"   fwinfo="endpoint;width=0" description="Number of words in BCN and L1A FIFO for TOB Readout"/>
  <node id="bcn_fifo_tob_pfull_thresh_assert"     address="0xc"  permission="rw" fwinfo="endpoint; width=0" description="BCN and L1A FIFO prog Full assertion threshold"/>
  <node id="bcn_fifo_tob_pfull_thresh_negate"     address="0xd"  permission="rw" fwinfo="endpoint; width=0" description="BCN and L1A FIFO prog Full negation threshold"/>
   
  <node id="xtob_eg_fifo_prog_full_thresh_assert"     address="0x10" permission="rw" fwinfo="endpoint;width=0" description="XTOB eg FIFO prog Full assertion threshold"/>
  <node id="xtob_eg_fifo_prog_full_thresh_negate"     address="0x11" permission="rw" fwinfo="endpoint;width=0" description="XTOB eg FIFO prog Full negation threshold"/>
  <node id="xtob_eg_fifo_data_count"                  address="0x12" permission="r"  fwinfo="endpoint;width=0" description="Number of words in eg XTOB FIFO"/>
  <node id="xtob_tau_fifo_prog_full_thresh_assert"    address="0x13" permission="rw" fwinfo="endpoint;width=0" description="XTOB tau FIFO prog Full assertion threshold"/>
  <node id="xtob_tau_fifo_prog_full_thresh_negate"    address="0x14" permission="rw" fwinfo="endpoint;width=0" description="XTOB tau FIFO prog Full negation threshold"/>
  <node id="xtob_tau_fifo_data_count"                 address="0x15" permission="r"  fwinfo="endpoint;width=0" description="Number of words in tau XTOB FIFO"/>
 
 
  <node id="link_output_fifo_prog_full_thresh_assert" address="0x20" permission="rw" fwinfo="endpoint;width=0" description="TOB/XTOB L/O FIFO prog Full assertion threshold"/> 
  <node id="link_output_fifo_prog_full_thresh_negate" address="0x21" permission="rw" fwinfo="endpoint;width=0" description="TOB/XTOB L/O FIFO prog Full negation threshold"/> 
  <node id="link_output_fifo_rd_data_count"           address="0x22" permission="r"  fwinfo="endpoint;width=0" description="Number of words  available for reading in the L/O FIFO"/>

  <node id="tob_data_fifo_flags"        address="0x30" permission="r" fwinfo="endpoint;width=0" description="Pulse register inside the readout block">
    <node id="fifo_tob_data_empty"         mask="0x00000001"  description="TOB FIFO empty flag"/>
    <node id="fifo_tob_data_prog_full"     mask="0x00000002"  description="TOB FIFO programmable full flag"/>
    <node id="fifo_tob_data_full"          mask="0x00000004"  description="TOB FIFO full flag"/>
    <node id="xtob_eg_empty"               mask="0x00000008"  description="XTOB e/g FIFO empty flag"/>
    <node id="xtob_eg_prog_full"           mask="0x00000010"  description="XTOB e/g FIFO prog full flag"/>
    <node id="xtob_eg_full"                mask="0x00000020"  description="XTOB e/g FIFO full flag"/>
    <node id="xtob_tau_fifo_empty"         mask="0x00000040"  description="XTOB tau FIFO empty flag"/>
    <node id="xtob_tau_prog_full"          mask="0x00000080"  description="XTOB tau FIFO prog_full flag"/>
    <node id="xtob_tau_full"               mask="0x00000100"  description="XTOB tau FIFO full flag" />
    <node id="link_output_fifo_empty"      mask="0x00000200"  description="Link_output_FIFO empty flag"/>
    <node id="link_output_fifo_prog_full"  mask="0x00000400"  description="Link_output_FIFO prog_full flag "/>
    <node id="link_output_fifo_full"       mask="0x00000800"  description="Link_output_FIFO full flag"/>
    <node id="bcn_fifo_empty"              mask="0x00001000"  description="BCN FIFO empty flag"/>
    <node id="bcn_fifo_prog_full"          mask="0x00002000"  description="BCN FIFO prog_full flag "/>
    <node id="bcn_fifo_full"               mask="0x00004000"  description="BCN FIFO full flag"/>
	<node id="tob_safe_mode"               mask="0x00008000"  description="Safe Mode flag for TOB readout"/>
	<node id="tob_ready_in"                mask="0x00010000"  description="Ready signal from control FPGA for TOB readout"/>
	<node id="tob_data_busy"               mask="0x00020000"  description="TOB data Busy flag"/>
  </node>
  
  <node id="spy_tob_mem_wr_addr"	address="0x31" permission="r" fwinfo="endpoint;width=0" description="wr address pointer of TOB data spy memory"/>

  <node id="tob_fsm_monitor"		address="0x40"  permission="r"  fwinfo="endpoint;width=3" description="Monitor TOB Readout state machines">
    <node id="tob_data_dpram_fsm"		address="0x0" permission="r"   description="TOB data write to DPRAM FSM"/>
    <node id="xtob_eg_data_dpram_fsm"	address="0x1" permission="r"   description="XTOB e/g data DPRAM FSM"/>
    <node id="xtob_tau_data_dpram_fsm"	address="0x2" permission="r"   description="XTOB tau data DPRAM FSM"/>
    <node id="tob_data_mux_fsm"     	address="0x3" permission="r"   description="TOB data mux PISO FSM"/>
    <node id="tob_data_mgt_fsm"			address="0x4" permission="r"   description="TOB data LO FIFO to MGT FSM"/>
  </node>
  
  <node id="tob_data_spy_mem"       address="0x1000" size="0x800"  mode="block" description="spy RAM for TOB/XTOB input data" fwinfo="endpoint;width=11"/>
</node >
