## efex_processor.4 Synthesis Utilization report
                                                                                     
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |   
| ---    |         ---  |        --- |         ---  |             ---  |             
| Slice  LUTs*     |    182112   |   0         |    346400        |    52.57     |   
| Slice  Registers |    255324   |   0         |    692800        |    36.85     |   
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03
| DSPs   |         0    |        0   |         2880 |             0.00 |             
| Bonded IOB       |    502      |   0         |    600           |    83.67     |   
                                                                                     
## efex_processor.4 Implementation Utilization report
                                                                                      
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |    
| ---    |         ---  |        --- |         ---  |             ---  |              
| Slice  LUTs      |    191340   |   0         |    346400        |    55.24     |    
| Slice  Registers |    282358   |   0         |    692800        |    40.76     |    
| Block  RAM       Tile |        739 |         0    |             1180 |         62.63
| DSPs   |         120  |        0   |         2880 |             4.17 |              
| Bonded IOB       |    252      |   250       |    600           |    42.00     |