## Repository info - Merge request number: 308 - Branch name: minor_version/stealth_boot ## MR Description Update ipbus_decode_efex_cntrl_infrastructure to be more consistent with ipbus_decode_efex_infrastructure Disable incoming ethernet if trigger_reconfig armed ## Changelog - disable incoming ethernet if trigger_reconfig armed - Check CTTC CRC before resetting Control FPGA BCN on BCR ## efex_processor.3 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | d6802f0 | 1.6.0 | | Constraints | d6802f0d | 1.6.0 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 544c0a0 | 0.8.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | | **Lib:** usr_ip | e9b43d6 | 1.5.6 | ## golden/efex_golden_processor.2 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | 7d3a917 | 1.6.0 | | Constraints | f68521ee | 1.3.3 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 544c0a0 | 0.8.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | ## golden/efex_golden_processor.1 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | 7d3a917 | 1.6.0 | | Constraints | f68521ee | 1.3.3 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 9d86591 | 0.17.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | ## golden/efex_golden_control Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | f6704a2 | 1.6.0 | | Constraints | 2bcde983 | 1.3.3 | | IPbus XML | 7d3a917 | 1.6.0 | | Top Directory | 61e9503 | 0.17.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** infrastructure_lib | f6704a2 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | ## golden/efex_golden_processor.4 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | 7d3a917 | 1.6.0 | | Constraints | f68521ee | 1.3.3 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 544c0a0 | 0.8.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | ## golden/efex_golden_processor.3 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | 7d3a917 | 1.6.0 | | Constraints | f68521ee | 1.3.3 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 544c0a0 | 0.8.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | ## efex_processor.4 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | 7d3a917 | 1.6.0 | | Constraints | 96639250 | 1.5.6 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 544c0a0 | 0.8.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | | **Lib:** usr_ip | e9b43d6 | 1.5.6 | ## efex_processor.1 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | c497651 | 1.6.0 | | Constraints | c497651e | 1.6.0 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 6fb4826 | 0.14.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | | **Lib:** usr_ip | e9b43d6 | 1.5.6 | ## efex_control Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | f6704a2 | 1.6.0 | | Constraints | 00fb8dc1 | 1.5.6 | | IPbus XML | 7d3a917 | 1.6.0 | | Top Directory | d88faa0 | 0.15.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** infrastructure_lib | f6704a2 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | ## efex_processor.2 Version Table | **File set** | **Commit SHA** | **Version** | | --- | --- | --- | | Global | 7d3a917 | 1.6.0 | | Constraints | 9d51af7e | 1.5.6 | | IPbus XML | 36d50f0 | 1.5.6 | | Top Directory | 544c0a0 | 0.8.0 | | Hog | 7dd4817 | 6.48.5 | | **Lib:** TOB_rdout_lib | 36d50f0 | 1.5.6 | | **Lib:** algolib | 966b35f | 1.5.6 | | **Lib:** infrastructure_lib | 7d3a917 | 1.6.0 | | **Lib:** ipbus_lib | d6f4f62 | 1.0.0 | | **Lib:** usr_ip | e9b43d6 | 1.5.6 | ## efex_processor.3 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 0.001719 | | TNS: | 0.000000 | | WHS: | 0.028017 | | THS: | 0.000000 | Time requirements are met. ## golden/efex_golden_processor.2 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 2.300871 | | TNS: | 0.000000 | | WHS: | 0.076502 | | THS: | 0.000000 | Time requirements are met. ## golden/efex_golden_processor.1 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 2.919752 | | TNS: | 0.000000 | | WHS: | 0.070296 | | THS: | 0.000000 | Time requirements are met. ## golden/efex_golden_control Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 0.150692 | | TNS: | 0.000000 | | WHS: | 0.047834 | | THS: | 0.000000 | Time requirements are met. ## golden/efex_golden_processor.4 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 2.204903 | | TNS: | 0.000000 | | WHS: | 0.078810 | | THS: | 0.000000 | Time requirements are met. ## golden/efex_golden_processor.3 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 2.573770 | | TNS: | 0.000000 | | WHS: | 0.067271 | | THS: | 0.000000 | Time requirements are met. ## efex_processor.4 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 0.000944 | | TNS: | 0.000000 | | WHS: | 0.012037 | | THS: | 0.000000 | Time requirements are met. ## efex_processor.1 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 0.048296 | | TNS: | 0.000000 | | WHS: | 0.012596 | | THS: | 0.000000 | Time requirements are met. ## efex_control Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 0.016855 | | TNS: | 0.000000 | | WHS: | 0.056763 | | THS: | 0.000000 | Time requirements are met. ## efex_processor.2 Timing summary | **Parameter** | **value (ns)** | | --- | --- | | WNS: | 0.001950 | | TNS: | 0.000000 | | WHS: | 0.025509 | | THS: | 0.000000 | Time requirements are met. ## efex_processor.3 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 182431 | 0 | 346400 | 52.66 | | Slice Registers | 256628 | 0 | 692800 | 37.04 | | Block RAM Tile | 24 | 0 | 1180 | 2.03 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 502 | 0 | 600 | 83.67 | ## efex_processor.3 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 190009 | 0 | 346400 | 54.85 | | Slice Registers | 281484 | 0 | 692800 | 40.63 | | Block RAM Tile | 731.5 | 0 | 1180 | 61.99 | DSPs | 120 | 0 | 2880 | 4.17 | | Bonded IOB | 252 | 250 | 600 | 42.00 | ## golden/efex_golden_processor.2 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 2664 | 0 | 346400 | 0.77 | | Slice Registers | 3645 | 0 | 692800 | 0.53 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 39 | 0 | 600 | 6.50 | ## golden/efex_golden_processor.2 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 2541 | 0 | 346400 | 0.73 | | Slice Registers | 3579 | 0 | 692800 | 0.52 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 39 | 39 | 600 | 6.50 | ## golden/efex_golden_processor.1 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 2662 | 0 | 346400 | 0.77 | | Slice Registers | 3644 | 0 | 692800 | 0.53 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 39 | 0 | 600 | 6.50 | ## golden/efex_golden_processor.1 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 2534 | 0 | 346400 | 0.73 | | Slice Registers | 3578 | 0 | 692800 | 0.52 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 39 | 39 | 600 | 6.50 | ## golden/efex_golden_control Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 4863 | 0 | 204000 | 2.38 | | Slice Registers | 5195 | 0 | 408000 | 1.27 | | Block RAM Tile | 22 | 0 | 750 | 2.93 | DSPs | 0 | 0 | 1120 | 0.00 | | Bonded IOB | 143 | 0 | 600 | 23.83 | ## golden/efex_golden_control Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 4991 | 0 | 204000 | 2.45 | | Slice Registers | 5899 | 0 | 408000 | 1.45 | | Block RAM Tile | 22.5 | 0 | 750 | 3.00 | DSPs | 0 | 0 | 1120 | 0.00 | | Bonded IOB | 167 | 155 | 600 | 27.83 | ## golden/efex_golden_processor.4 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 2666 | 0 | 346400 | 0.77 | | Slice Registers | 3646 | 0 | 692800 | 0.53 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 41 | 0 | 600 | 6.83 | ## golden/efex_golden_processor.4 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 2540 | 0 | 346400 | 0.73 | | Slice Registers | 3580 | 0 | 692800 | 0.52 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 41 | 39 | 600 | 6.83 | ## golden/efex_golden_processor.3 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 2664 | 0 | 346400 | 0.77 | | Slice Registers | 3645 | 0 | 692800 | 0.53 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 41 | 0 | 600 | 6.83 | ## golden/efex_golden_processor.3 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 2540 | 0 | 346400 | 0.73 | | Slice Registers | 3579 | 0 | 692800 | 0.52 | | Block RAM Tile | 20 | 0 | 1180 | 1.69 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 41 | 39 | 600 | 6.83 | ## efex_processor.4 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 182426 | 0 | 346400 | 52.66 | | Slice Registers | 256620 | 0 | 692800 | 37.04 | | Block RAM Tile | 24 | 0 | 1180 | 2.03 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 502 | 0 | 600 | 83.67 | ## efex_processor.4 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 189907 | 0 | 346400 | 54.82 | | Slice Registers | 281530 | 0 | 692800 | 40.64 | | Block RAM Tile | 731.5 | 0 | 1180 | 61.99 | DSPs | 120 | 0 | 2880 | 4.17 | | Bonded IOB | 252 | 250 | 600 | 42.00 | ## efex_processor.1 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 186199 | 0 | 346400 | 53.75 | | Slice Registers | 268185 | 0 | 692800 | 38.71 | | Block RAM Tile | 24 | 0 | 1180 | 2.03 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 500 | 0 | 600 | 83.33 | ## efex_processor.1 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 193217 | 0 | 346400 | 55.78 | | Slice Registers | 292827 | 0 | 692800 | 42.27 | | Block RAM Tile | 742.5 | 0 | 1180 | 62.92 | DSPs | 120 | 0 | 2880 | 4.17 | | Bonded IOB | 448 | 448 | 600 | 74.67 | ## efex_control Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 30122 | 0 | 204000 | 14.77 | | Slice Registers | 50919 | 0 | 408000 | 12.48 | | Block RAM Tile | 322 | 0 | 750 | 42.93 | DSPs | 0 | 0 | 1120 | 0.00 | | Bonded IOB | 382 | 0 | 600 | 63.67 | ## efex_control Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 38138 | 0 | 204000 | 18.70 | | Slice Registers | 69489 | 0 | 408000 | 17.03 | | Block RAM Tile | 361.5 | 0 | 750 | 48.20 | DSPs | 0 | 0 | 1120 | 0.00 | | Bonded IOB | 350 | 338 | 600 | 58.33 | ## efex_processor.2 Synthesis Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs* | 186261 | 0 | 346400 | 53.77 | | Slice Registers | 268196 | 0 | 692800 | 38.71 | | Block RAM Tile | 24 | 0 | 1180 | 2.03 | DSPs | 0 | 0 | 2880 | 0.00 | | Bonded IOB | 500 | 0 | 600 | 83.33 | ## efex_processor.2 Implementation Utilization report | **Site Type** | **Used** | **Fixed** | **Available** | **Util%** | | --- | --- | --- | --- | --- | | Slice LUTs | 193539 | 0 | 346400 | 55.87 | | Slice Registers | 293120 | 0 | 692800 | 42.31 | | Block RAM Tile | 742.5 | 0 | 1180 | 62.92 | DSPs | 120 | 0 | 2880 | 4.17 | | Bonded IOB | 448 | 448 | 600 | 74.67 |