<?xml version="1.0" encoding="ISO-8859-1"?>
<!-- version: 1.6.0     sha: 7D3A917 -->

<node fwinfo="endpoint;width=13">
  <node id="module_reg" address="0x0" description="Module ID"  fwinfo="endpoint;width=1">
    <node id="control" address="0x0" description="Module Control">
      <node description="select TTC input"      id="xtal_ttc_sel" 	 mask="0x1" />
      <node description="start synchronisation" id="start" 	 mask="0x2" />
      <node description="PLL power down"        id="powerdn_b_cdce" mask="0x4" />
      <node description="FTM TTC delay mode"        id="ftm_ttc_mode" mask="0x8" />
      <node description="Disable CRC check"        id="crc_disable" mask="0x20" />
      <node description="PLL sync"             id="sync_b_cdce" 	 mask="0x40" />
      <node description="TTC enable"             id="ttc_enable" 	 mask="0x80" />
      <node description="L1A enable"             id="l1a_enable" 	 mask="0x100" />
      <node description="ROD override"             id="rod_override" 	 mask="0x600" />
      <node description="TOB readout enable"             id="tob_ro_en" 	 mask="0xf000" />
      <node description="Raw readout enable"             id="raw_ro_en" 	 mask="0xf0000" />
      <node description="Aurora TOB link enable"             id="tob_aurora_en" 	 mask="0x300000" />
      <node description="Aurora Raw link enable"             id="raw_aurora_en" 	 mask="0xc00000" />
      <node description="Processor FPGA send reset_125" id="p_fpga_reset_125" mask="0xf000000" />
      <node id="reconfigure" mask="0x40000000" description="Reconfigure firmware from FLASH memory" />
    </node>
    <node id="status" address="0x1" description="Module status">
      <node description="PLL 1 lock" id="pll_1_lock" mask="0x1"/>
      <node description="PLL 2 lock" id="pll_2_lock" mask="0x2"/>
      <node description="PLL 3 lock" id="pll_3_lock" mask="0x4"/>
      <node description="TTC clk lock" id="ttc_clk_lock" mask="0x8"/>
      <node description="Processor FPGA programmed" id="pfpga_programmed" mask="0xf0"/>
      <node description="Processor FPGA IPBus up" id="pfpga_ipbus_up" mask="0xf00"/>
    </node>
  </node>

 <node id="xadc" address="0x20" description="XADC"  fwinfo="endpoint;width=5">
    <node id="temperature" address="0x0" permission="r" />
    <node id="temp_min" address="0x1"    permission="r" />
    <node id="temp_max" address="0x2"    permission="r" />
    <node id="vccint" address="0x3"      permission="r" />
    <node id="vccint_min" address="0x4"  permission="r" />
    <node id="vccint_max" address="0x5"  permission="r" />
    <node id="vccaux" address="0x6"      permission="r" />
    <node id="vccaux_min" address="0x7"  permission="r" />
    <node id="vccaux_max" address="0x8"  permission="r" />
    <node id="vccbram" address="0x9"     permission="r" />
    <node id="vccbram_min" address="0xA" permission="r" />
    <node id="vccbram_max" address="0xB" permission="r" />
	<node id="adc_2V5_val_0V63" address="0xC"  permission="r" />
	<node id="adc_1V05_val_0V5"  address="0xD"  permission="r" />
	<node id="adc_1V0_val_0V5"  address="0xE"  permission="r" />
	<node id="adc_3V3_val_0V83" address="0xF" permission="r" />
	<node id="adc_1V2_val_0V6"  address="0x10" permission="r" />
	<node id="adc_1V8_val_0V9"  address="0x11" permission="r" />
    <node id="adc_3V3_val_0V945"  address="0x12" permission="r" />

 </node>

 <node id="reconfigure" address="0x45" description="FPGA Configuration register"  fwinfo="endpoint;width=0">
  <node id="address" mask="0xFFFFFFFF" description="Address for warm boot from FLASH memory. Typically 0x0 for golden or 0x20000 for user image"/>
</node>

<node id="i2c" address="0x50" description="I2C interface "   fwinfo="endpoint;width= 4">
        <node id="ps_lo" address="0x0" permission="rw" />
        <node id="ps_hi" address="0x1" permission="rw" />
        <node id="ctrl"  address="0x2" permission="rw" />
	    <node id="data"  address="0x3" permission="rw" />
        <node id="cmd_stat" address="0x4" permission="rw" />
		<node id="key_lock" address="0x8"  permission="rw" >
		    <node id="key"  mask="0x7FFFFFFC"/>
            <node id="lock" mask="0x2"/>
            <node id="terr" mask="0x1"/>
        </node>
	        <node id="timeout"  address="0x9" permission="rw" >
            <node id="timer" mask="0xFFFFF"/>
       </node>

 </node>

 <node id="pll_spi_ram" address="0x100" description="PLL clock SPI interface"  fwinfo="endpoint;width=6">
    <node id="select" address="0x0"    permission="rw"/>
	<node id="num_words" address="0x2" permission="rw"/>
	<node id="command" address="0x3"   permission="rw">
	<node id="do_it" mask="0x1"/>
	</node>
        <node id="status" address="0x4">
        <node id="busy" mask="0x1"/>
     </node>

        <node id="key_lock"  address="0x10" permission="rw" >
        <node id="key"  mask="0x7FFFFFFC"/>
        <node id="lock" mask="0x2"/>
        <node id="terr" mask="0x1"/>
     </node>

      <node id="timeout"   address="0x11" permission="rw" >
      <node id="timer" mask="0xFFFFF"/>
      </node>

        <node id="outgoing" address="0x20" mode="block" size="0x10" description="16wordRAM"/>
	<node id="incoming" address="0x30" mode="block" size="0x10" description="16wordRAM"/>
 </node>

   <node id="flash_spi_ram" address="0x200" description="FPGA Configurtion SPI interface" tags= "slave" fwinfo="endpoint;width=9">
        <node id="select" address="0x0"    permission="rw"/>
        <node id="num_words" address="0x2" permission="rw"/>
	<node id="command" address="0x3"   permission="rw">
	<node id="do_it" mask="0x1"/>
	</node>
        <node id="status" address="0x4" permission="r">
        <node id="busy" mask="0x1"/>
   </node>

	<node id="key_lock"  address="0x80" permission="rw" >
        <node id="key"  mask="0x7FFFFFFC"/>
        <node id="lock" mask="0x2"/>
        <node id="terr" mask="0x1"/>
    </node>

        <node id="timeout"   address="0x81" permission="rw" >
        <node id="timer" mask="0xFFFFF"/>
     </node>

        <node id="outgoing" address="0x100" mode="block" size="0x80" description="128wordRAM" permission="rw"/>
	<node id="incoming" address="0x180" mode="block" size="0x80" description="128wordRAM" permission="rw"/>
 </node>

 <node id="ram" address="0x1000"  mode="block" size="0x400"  description="1kword RAM" fwinfo="endpoint;width=10" permission="rw"/>
</node>
