## Repository info
- Merge request number: 317
- Branch name: feature/reset_phy

## MR Description
Based on feature/full_xtob_ro and feature/tau_bdt_algorithm


## Changelog

- Assert phy_rstb for 10 us before reconfigure

## efex_control


<p>
<details>
<summary>show/hide</summary> 

 ## efex_control Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.043928       |
| TNS:          | 0.000000       |
| WHS:          | 0.052602       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_control Synthesis Utilization report


                                                                                         
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        --- |         ---  |             ---  |                 
| Slice  LUTs*     |    30118    |   0         |    204000        |    14.76     |       
| Slice  Registers |    50937    |   0         |    408000        |    12.48     |       
| Block  RAM       Tile |        322 |         0    |             750  |         42.93 | 
| DSPs   |         0    |        0   |         1120 |             0.00 |                 
| Bonded IOB       |    382      |   0         |    600           |    63.67     |       
                                                                                         
## efex_control Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    38128    |     0         |    204000        |    18.69     |       
| Slice  Registers |    69502    |     0         |    408000        |    17.03     |       
| Block  RAM       Tile |        361.5 |         0    |             750  |         48.20 | 
| DSPs   |         0    |        0     |         1120 |             0.00 |                 
| Bonded IOB       |    350      |     338       |    600           |    58.33     |       
                                                                                           
## efex_control Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | dffbea9        | 1.6.3       |
| Constraints                 | 76f269ad       | 1.6.3       |
| IPbus XML                   | 7d3a917        | 1.6.0       |
| Top Directory               | d88faa0        | 0.15.0      |
| Hog                         | 1c2dc31        | 7.17.8      |
| **Lib:** infrastructure_lib | dffbea9        | 1.6.3       |
| **Lib:** others             | 3fb8246        | 1.4.0       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |



</details>
</p>

 
## efex_processor.2


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.2 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.058391       |
| TNS:          | 0.000000       |
| WHS:          | 0.015777       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.2 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    182979   |   0         |    346400        |    52.82     |      
| Slice  Registers |    247404   |   0         |    692800        |    35.71     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    501      |   0         |    600           |    83.50     |      
                                                                                        
## efex_processor.2 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    191455   |     0         |    346400        |    55.27     |       
| Slice  Registers |    274082   |     0         |    692800        |    39.56     |       
| Block  RAM       Tile |        759.5 |         0    |             1180 |         64.36 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    449      |     449       |    600           |    74.83     |       
                                                                                           
## efex_processor.2 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | 6e70c54        | 1.6.3       |
| Constraints                 | 6e70c54a       | 1.6.3       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 544c0a0        | 0.8.0       |
| Hog                         | 1c2dc31        | 7.17.8      |
| **Lib:** TOB_rdout_lib      | a5f852a        | 1.6.3       |
| **Lib:** algolib            | d984410        | 1.6.3       |
| **Lib:** infrastructure_lib | 48ae980        | 1.6.3       |
| **Lib:** others             | 8107f27        | 1.6.3       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | a6ae55a        | 1.6.3       |



</details>
</p>

 
## efex_processor.3


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.3 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.096159       |
| TNS:          | 0.000000       |
| WHS:          | 0.018329       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.3 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    178903   |   0         |    346400        |    51.65     |      
| Slice  Registers |    235885   |   0         |    692800        |    34.05     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    503      |   0         |    600           |    83.83     |      
                                                                                        
## efex_processor.3 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    187477   |     0         |    346400        |    54.12     |       
| Slice  Registers |    262738   |     0         |    692800        |    37.92     |       
| Block  RAM       Tile |        748.5 |         0    |             1180 |         63.43 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    253      |     251       |    600           |    42.17     |       
                                                                                           
## efex_processor.3 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | 6e70c54        | 1.6.3       |
| Constraints                 | 6e70c54a       | 1.6.3       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 544c0a0        | 0.8.0       |
| Hog                         | 1c2dc31        | 7.17.8      |
| **Lib:** TOB_rdout_lib      | a5f852a        | 1.6.3       |
| **Lib:** algolib            | d984410        | 1.6.3       |
| **Lib:** infrastructure_lib | 48ae980        | 1.6.3       |
| **Lib:** others             | 8107f27        | 1.6.3       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | a6ae55a        | 1.6.3       |



</details>
</p>

 
## efex_processor.4


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.4 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.007103       |
| TNS:          | 0.000000       |
| WHS:          | 0.012200       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.4 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    178895   |   0         |    346400        |    51.64     |      
| Slice  Registers |    235885   |   0         |    692800        |    34.05     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    503      |   0         |    600           |    83.83     |      
                                                                                        
## efex_processor.4 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    187146   |     0         |    346400        |    54.03     |       
| Slice  Registers |    262829   |     0         |    692800        |    37.94     |       
| Block  RAM       Tile |        748.5 |         0    |             1180 |         63.43 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    253      |     251       |    600           |    42.17     |       
                                                                                           
## efex_processor.4 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | a5f852a        | 1.6.3       |
| Constraints                 | 55dbcd96       | 1.6.3       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 544c0a0        | 0.8.0       |
| Hog                         | 1c2dc31        | 7.17.8      |
| **Lib:** TOB_rdout_lib      | a5f852a        | 1.6.3       |
| **Lib:** algolib            | d984410        | 1.6.3       |
| **Lib:** infrastructure_lib | 48ae980        | 1.6.3       |
| **Lib:** others             | 8107f27        | 1.6.3       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | a6ae55a        | 1.6.3       |



</details>
</p>

 
## efex_processor.1


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.1 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.071921       |
| TNS:          | 0.000000       |
| WHS:          | 0.031226       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.1 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    182939   |   0         |    346400        |    52.81     |      
| Slice  Registers |    247395   |   0         |    692800        |    35.71     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    501      |   0         |    600           |    83.50     |      
                                                                                        
## efex_processor.1 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    191264   |     0         |    346400        |    55.21     |       
| Slice  Registers |    274035   |     0         |    692800        |    39.55     |       
| Block  RAM       Tile |        759.5 |         0    |             1180 |         64.36 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    449      |     449       |    600           |    74.83     |       
                                                                                           
## efex_processor.1 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | a5f852a        | 1.6.3       |
| Constraints                 | 1e62041f       | 1.6.3       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 6fb4826        | 0.14.0      |
| Hog                         | 1c2dc31        | 7.17.8      |
| **Lib:** TOB_rdout_lib      | a5f852a        | 1.6.3       |
| **Lib:** algolib            | d984410        | 1.6.3       |
| **Lib:** infrastructure_lib | 48ae980        | 1.6.3       |
| **Lib:** others             | 8107f27        | 1.6.3       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | a6ae55a        | 1.6.3       |



</details>
</p>