## Repository info
- Merge request number: 326
- Branch name: feature/register_readout_mgt

## MR Description



## Changelog


## efex_processor.3


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.3 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.072008       |
| TNS:          | 0.000000       |
| WHS:          | 0.049340       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.3 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    178916   |   0         |    346400        |    51.65     |      
| Slice  Registers |    235087   |   0         |    692800        |    33.93     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    503      |   0         |    600           |    83.83     |      
                                                                                        
## efex_processor.3 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    186185   |     0         |    346400        |    53.75     |       
| Slice  Registers |    259816   |     0         |    692800        |    37.50     |       
| Block  RAM       Tile |        747.5 |         0    |             1180 |         63.35 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    253      |     251       |    600           |    42.17     |       
                                                                                           
## efex_processor.3 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | 215dc0a        | 1.6.7       |
| Constraints                 | e8c46fd1       | 1.6.7       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 544c0a0        | 0.8.0       |
| Hog                         | 20623bf        | 7.31.2      |
| **Lib:** TOB_rdout_lib      | e8c46fd        | 1.6.7       |
| **Lib:** algolib            | 2ced6e0        | 1.6.6       |
| **Lib:** infrastructure_lib | e8c46fd        | 1.6.7       |
| **Lib:** others             | c8f8823        | 1.6.7       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | 215dc0a        | 1.6.7       |



</details>
</p>

 
## efex_processor.4


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.4 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.035851       |
| TNS:          | 0.000000       |
| WHS:          | 0.013598       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.4 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    178909   |   0         |    346400        |    51.65     |      
| Slice  Registers |    235087   |   0         |    692800        |    33.93     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    503      |   0         |    600           |    83.83     |      
                                                                                        
## efex_processor.4 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    187223   |     0         |    346400        |    54.05     |       
| Slice  Registers |    260896   |     0         |    692800        |    37.66     |       
| Block  RAM       Tile |        747.5 |         0    |             1180 |         63.35 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    253      |     251       |    600           |    42.17     |       
                                                                                           
## efex_processor.4 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | 215dc0a        | 1.6.7       |
| Constraints                 | a3338ac5       | 1.6.4       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 544c0a0        | 0.8.0       |
| Hog                         | 20623bf        | 7.31.2      |
| **Lib:** TOB_rdout_lib      | e8c46fd        | 1.6.7       |
| **Lib:** algolib            | 2ced6e0        | 1.6.6       |
| **Lib:** infrastructure_lib | e8c46fd        | 1.6.7       |
| **Lib:** others             | c8f8823        | 1.6.7       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | 215dc0a        | 1.6.7       |



</details>
</p>

 
## efex_processor.2


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.2 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.037178       |
| TNS:          | 0.000000       |
| WHS:          | 0.022004       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.2 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    183003   |   0         |    346400        |    52.83     |      
| Slice  Registers |    246607   |   0         |    692800        |    35.60     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    501      |   0         |    600           |    83.50     |      
                                                                                        
## efex_processor.2 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    190605   |     0         |    346400        |    55.02     |       
| Slice  Registers |    272239   |     0         |    692800        |    39.30     |       
| Block  RAM       Tile |        758.5 |         0    |             1180 |         64.28 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    449      |     449       |    600           |    74.83     |       
                                                                                           
## efex_processor.2 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | 31e5123        | 1.6.7       |
| Constraints                 | 31e51230       | 1.6.7       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 544c0a0        | 0.8.0       |
| Hog                         | 20623bf        | 7.31.2      |
| **Lib:** TOB_rdout_lib      | e8c46fd        | 1.6.7       |
| **Lib:** algolib            | 2ced6e0        | 1.6.6       |
| **Lib:** infrastructure_lib | e8c46fd        | 1.6.7       |
| **Lib:** others             | c8f8823        | 1.6.7       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | 215dc0a        | 1.6.7       |



</details>
</p>

 
## efex_processor.1


<p>
<details>
<summary>show/hide</summary> 

 ## efex_processor.1 Timing summary
                                  
| **Parameter** | **value (ns)** |
| ---           | ---            |
| WNS:          | 0.054124       |
| TNS:          | 0.000000       |
| WHS:          | 0.016307       |
| THS:          | 0.000000       |


 Time requirements are met.



## efex_processor.1 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    182953   |   0         |    346400        |    52.82     |      
| Slice  Registers |    246597   |   0         |    692800        |    35.59     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    501      |   0         |    600           |    83.50     |      
                                                                                        
## efex_processor.1 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    189872   |     0         |    346400        |    54.81     |       
| Slice  Registers |    271165   |     0         |    692800        |    39.14     |       
| Block  RAM       Tile |        758.5 |         0    |             1180 |         64.28 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    449      |     449       |    600           |    74.83     |       
                                                                                           
## efex_processor.1 Version Table

| **File set**                | **Commit SHA** | **Version** |
| ---                         | ---            | ---         |
| Global                      | 49a040f        | 1.6.7       |
| Constraints                 | 49a040f0       | 1.6.7       |
| IPbus XML                   | 8f38057        | 1.6.2       |
| Top Directory               | 6fb4826        | 0.14.0      |
| Hog                         | 20623bf        | 7.31.2      |
| **Lib:** TOB_rdout_lib      | e8c46fd        | 1.6.7       |
| **Lib:** algolib            | 2ced6e0        | 1.6.6       |
| **Lib:** infrastructure_lib | e8c46fd        | 1.6.7       |
| **Lib:** others             | c8f8823        | 1.6.7       |
| **Lib:** ipbus_lib          | d6f4f62        | 1.0.0       |
| **Lib:** usr_ip             | 215dc0a        | 1.6.7       |



</details>
</p>

 
