*** Running vivado with args -log AlgoOutputRAM.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source AlgoOutputRAM.tcl ****** Vivado v2020.2 (64-bit) **** SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020 **** IP Build 3064653 on Wed Nov 18 14:17:31 MST 2020 ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved. source AlgoOutputRAM.tcl -notrace Command: synth_design -top AlgoOutputRAM -part xc7vx550tffg1927-2 -mode out_of_context Starting synth_design Attempting to get a license for feature 'Synthesis' and/or device 'xc7vx550t' INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7vx550t' INFO: [Device 21-403] Loading part xc7vx550tffg1927-2 INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 4 processes. INFO: [Synth 8-7078] Launching helper process for spawning children vivado processes INFO: [Synth 8-7075] Helper process launched with PID 3675059 --------------------------------------------------------------------------------- Starting RTL Elaboration : Time (s): cpu = 00:00:09 ; elapsed = 00:00:17 . Memory (MB): peak = 2674.250 ; gain = 82.719 ; free physical = 29855 ; free virtual = 52333 --------------------------------------------------------------------------------- INFO: [Synth 8-638] synthesizing module 'AlgoOutputRAM' [/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/IP/Algorithm/AlgoOutputRAM/synth/AlgoOutputRAM.vhd:76] WARNING: [Synth 8-3819] Generic 'GLOBAL_DATE' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'GLOBAL_TIME' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'GLOBAL_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'GLOBAL_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'TOP_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'TOP_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'HOG_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'HOG_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'CON_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'CON_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'XML_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'XML_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'TOB_RDOUT_LIB_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'TOB_RDOUT_LIB_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'INFRASTRUCTURE_LIB_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'INFRASTRUCTURE_LIB_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'IPS_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'IPS_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'IPBUS_LIB_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'IPBUS_LIB_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'ALGOLIB_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'ALGOLIB_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'USR_IP_VER' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'USR_IP_SHA' not present in instantiated entity will be ignored WARNING: [Synth 8-3819] Generic 'FLAVOUR' not present in instantiated entity will be ignored Parameter C_FAMILY bound to: virtex7 - type: string Parameter C_XDEVICEFAMILY bound to: virtex7 - type: string Parameter C_ELABORATION_DIR bound to: ./ - type: string Parameter C_INTERFACE_TYPE bound to: 0 - type: integer Parameter C_AXI_TYPE bound to: 1 - type: integer Parameter C_AXI_SLAVE_TYPE bound to: 0 - type: integer Parameter C_USE_BRAM_BLOCK bound to: 0 - type: integer Parameter C_ENABLE_32BIT_ADDRESS bound to: 0 - type: integer Parameter C_CTRL_ECC_ALGO bound to: NONE - type: string Parameter C_HAS_AXI_ID bound to: 0 - type: integer Parameter C_AXI_ID_WIDTH bound to: 4 - type: integer Parameter C_MEM_TYPE bound to: 2 - type: integer Parameter C_BYTE_SIZE bound to: 9 - type: integer Parameter C_ALGORITHM bound to: 1 - type: integer Parameter C_PRIM_TYPE bound to: 1 - type: integer Parameter C_LOAD_INIT_FILE bound to: 0 - type: integer Parameter C_INIT_FILE_NAME bound to: no_coe_file_loaded - type: string Parameter C_INIT_FILE bound to: AlgoOutputRAM.mem - type: string Parameter C_USE_DEFAULT_DATA bound to: 0 - type: integer Parameter C_DEFAULT_DATA bound to: 0 - type: string Parameter C_HAS_RSTA bound to: 0 - type: integer Parameter C_RST_PRIORITY_A bound to: CE - type: string Parameter C_RSTRAM_A bound to: 0 - type: integer Parameter C_INITA_VAL bound to: 0 - type: string Parameter C_HAS_ENA bound to: 1 - type: integer Parameter C_HAS_REGCEA bound to: 0 - type: integer Parameter C_USE_BYTE_WEA bound to: 0 - type: integer Parameter C_WEA_WIDTH bound to: 1 - type: integer Parameter C_WRITE_MODE_A bound to: READ_FIRST - type: string Parameter C_WRITE_WIDTH_A bound to: 32 - type: integer Parameter C_READ_WIDTH_A bound to: 32 - type: integer Parameter C_WRITE_DEPTH_A bound to: 640 - type: integer Parameter C_READ_DEPTH_A bound to: 640 - type: integer Parameter C_ADDRA_WIDTH bound to: 10 - type: integer Parameter C_HAS_RSTB bound to: 0 - type: integer Parameter C_RST_PRIORITY_B bound to: CE - type: string Parameter C_RSTRAM_B bound to: 0 - type: integer Parameter C_INITB_VAL bound to: 0 - type: string Parameter C_HAS_ENB bound to: 1 - type: integer Parameter C_HAS_REGCEB bound to: 0 - type: integer Parameter C_USE_BYTE_WEB bound to: 0 - type: integer Parameter C_WEB_WIDTH bound to: 1 - type: integer Parameter C_WRITE_MODE_B bound to: READ_FIRST - type: string Parameter C_WRITE_WIDTH_B bound to: 256 - type: integer Parameter C_READ_WIDTH_B bound to: 256 - type: integer Parameter C_WRITE_DEPTH_B bound to: 80 - type: integer Parameter C_READ_DEPTH_B bound to: 80 - type: integer Parameter C_ADDRB_WIDTH bound to: 7 - type: integer Parameter C_HAS_MEM_OUTPUT_REGS_A bound to: 1 - type: integer Parameter C_HAS_MEM_OUTPUT_REGS_B bound to: 1 - type: integer Parameter C_HAS_MUX_OUTPUT_REGS_A bound to: 0 - type: integer Parameter C_HAS_MUX_OUTPUT_REGS_B bound to: 0 - type: integer Parameter C_MUX_PIPELINE_STAGES bound to: 0 - type: integer Parameter C_HAS_SOFTECC_INPUT_REGS_A bound to: 0 - type: integer Parameter C_HAS_SOFTECC_OUTPUT_REGS_B bound to: 0 - type: integer Parameter C_USE_SOFTECC bound to: 0 - type: integer Parameter C_USE_ECC bound to: 0 - type: integer Parameter C_EN_ECC_PIPE bound to: 0 - type: integer Parameter C_READ_LATENCY_A bound to: 1 - type: integer Parameter C_READ_LATENCY_B bound to: 1 - type: integer Parameter C_HAS_INJECTERR bound to: 0 - type: integer Parameter C_SIM_COLLISION_CHECK bound to: ALL - type: string Parameter C_COMMON_CLK bound to: 0 - type: integer Parameter C_DISABLE_WARN_BHV_COLL bound to: 0 - type: integer Parameter C_EN_SLEEP_PIN bound to: 0 - type: integer Parameter C_USE_URAM bound to: 0 - type: integer Parameter C_EN_RDADDRA_CHG bound to: 0 - type: integer Parameter C_EN_RDADDRB_CHG bound to: 0 - type: integer Parameter C_EN_DEEPSLEEP_PIN bound to: 0 - type: integer Parameter C_EN_SHUTDOWN_PIN bound to: 0 - type: integer Parameter C_EN_SAFETY_CKT bound to: 0 - type: integer Parameter C_DISABLE_WARN_BHV_RANGE bound to: 0 - type: integer Parameter C_COUNT_36K_BRAM bound to: 8 - type: string Parameter C_COUNT_18K_BRAM bound to: 0 - type: string Parameter C_EST_POWER_SUMMARY bound to: Estimated Power for IP : 46.550004 mW - type: string INFO: [Synth 8-3491] module 'blk_mem_gen_v8_4_4' declared at '/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/IP/Algorithm/AlgoOutputRAM/hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd:195321' bound to instance 'U0' of component 'blk_mem_gen_v8_4_4' [/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/IP/Algorithm/AlgoOutputRAM/synth/AlgoOutputRAM.vhd:249] INFO: [Synth 8-256] done synthesizing module 'AlgoOutputRAM' (9#1) [/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/IP/Algorithm/AlgoOutputRAM/synth/AlgoOutputRAM.vhd:76] --------------------------------------------------------------------------------- Finished RTL Elaboration : Time (s): cpu = 00:00:26 ; elapsed = 00:00:43 . Memory (MB): peak = 2922.500 ; gain = 330.969 ; free physical = 29745 ; free virtual = 52230 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:27 ; elapsed = 00:00:44 . Memory (MB): peak = 2922.500 ; gain = 330.969 ; free physical = 29735 ; free virtual = 52220 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:27 ; elapsed = 00:00:44 . Memory (MB): peak = 2922.500 ; gain = 330.969 ; free physical = 29735 ; free virtual = 52220 --------------------------------------------------------------------------------- Netlist sorting complete. Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2922.500 ; gain = 0.000 ; free physical = 29724 ; free virtual = 52208 INFO: [Netlist 29-17] Analyzing 8 Unisim elements for replacement INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds INFO: [Project 1-570] Preparing netlist for logic optimization Processing XDC Constraints Initializing timing engine Parsing XDC File [/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/IP/Algorithm/AlgoOutputRAM/AlgoOutputRAM_ooc.xdc] for cell 'U0' Finished Parsing XDC File [/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/IP/Algorithm/AlgoOutputRAM/AlgoOutputRAM_ooc.xdc] for cell 'U0' Parsing XDC File [/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/Projects/efex_processor.1/efex_processor.1.runs/AlgoOutputRAM_synth_1/dont_touch.xdc] Finished Parsing XDC File [/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/Projects/efex_processor.1/efex_processor.1.runs/AlgoOutputRAM_synth_1/dont_touch.xdc] Completed Processing XDC Constraints Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2986.531 ; gain = 0.000 ; free physical = 29748 ; free virtual = 52235 INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. Constraint Validation Runtime : Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.05 . Memory (MB): peak = 2986.531 ; gain = 0.000 ; free physical = 29753 ; free virtual = 52239 --------------------------------------------------------------------------------- Finished Constraint Validation : Time (s): cpu = 00:00:37 ; elapsed = 00:00:55 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 31161 ; free virtual = 53654 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Loading Part and Timing Information --------------------------------------------------------------------------------- Loading part: xc7vx550tffg1927-2 --------------------------------------------------------------------------------- Finished Loading Part and Timing Information : Time (s): cpu = 00:00:37 ; elapsed = 00:00:55 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 31161 ; free virtual = 53653 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying 'set_property' XDC Constraints --------------------------------------------------------------------------------- Applied set_property KEEP_HIERARCHY = SOFT for U0. (constraint file /fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/Projects/efex_processor.1/efex_processor.1.runs/AlgoOutputRAM_synth_1/dont_touch.xdc, line 9). --------------------------------------------------------------------------------- Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:37 ; elapsed = 00:00:55 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 31161 ; free virtual = 53653 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:37 ; elapsed = 00:00:55 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 31153 ; free virtual = 53646 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start RTL Component Statistics --------------------------------------------------------------------------------- Detailed RTL Component Info : --------------------------------------------------------------------------------- Finished RTL Component Statistics --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Part Resource Summary --------------------------------------------------------------------------------- Part Resources: DSPs: 2880 (col length:200) BRAMs: 2360 (col length: RAMB18 200 RAMB36 100) --------------------------------------------------------------------------------- Finished Part Resource Summary --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Cross Boundary and Area Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:38 ; elapsed = 00:00:56 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 31132 ; free virtual = 53632 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying XDC Timing Constraints --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:44 ; elapsed = 00:01:02 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30116 ; free virtual = 52617 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Timing Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Timing Optimization : Time (s): cpu = 00:00:44 ; elapsed = 00:01:02 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30086 ; free virtual = 52587 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Technology Mapping --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Technology Mapping : Time (s): cpu = 00:00:44 ; elapsed = 00:01:03 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30019 ; free virtual = 52520 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished IO Insertion : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30712 ; free virtual = 53213 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Instances --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Instances : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30712 ; free virtual = 53213 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Rebuilding User Hierarchy --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30712 ; free virtual = 53213 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Ports --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Ports : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30712 ; free virtual = 53213 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30712 ; free virtual = 53213 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Nets --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Nets : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30712 ; free virtual = 53213 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Writing Synthesis Report --------------------------------------------------------------------------------- Report BlackBoxes: +-+--------------+----------+ | |BlackBox name |Instances | +-+--------------+----------+ +-+--------------+----------+ Report Cell Usage: +------+---------+------+ | |Cell |Count | +------+---------+------+ |1 |RAMB36E1 | 8| +------+---------+------+ --------------------------------------------------------------------------------- Finished Writing Synthesis Report : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30712 ; free virtual = 53213 --------------------------------------------------------------------------------- Synthesis finished with 0 errors, 0 critical warnings and 0 warnings. Synthesis Optimization Runtime : Time (s): cpu = 00:00:42 ; elapsed = 00:01:00 . Memory (MB): peak = 2986.531 ; gain = 330.969 ; free physical = 30759 ; free virtual = 53260 Synthesis Optimization Complete : Time (s): cpu = 00:00:48 ; elapsed = 00:01:06 . Memory (MB): peak = 2986.531 ; gain = 395.000 ; free physical = 30759 ; free virtual = 53260 INFO: [Project 1-571] Translating synthesized netlist Netlist sorting complete. Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2986.531 ; gain = 0.000 ; free physical = 30845 ; free virtual = 53346 INFO: [Netlist 29-17] Analyzing 8 Unisim elements for replacement INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds INFO: [Project 1-570] Preparing netlist for logic optimization INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s). Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2986.531 ; gain = 0.000 ; free physical = 30695 ; free virtual = 53189 INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. INFO: [Common 17-83] Releasing license: Synthesis 19 Infos, 25 Warnings, 0 Critical Warnings and 0 Errors encountered. synth_design completed successfully synth_design: Time (s): cpu = 00:01:05 ; elapsed = 00:01:19 . Memory (MB): peak = 2986.531 ; gain = 403.004 ; free physical = 30729 ; free virtual = 53222 INFO: [Common 17-1381] The checkpoint '/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/Projects/efex_processor.1/efex_processor.1.runs/AlgoOutputRAM_synth_1/AlgoOutputRAM.dcp' has been generated. WARNING: [Common 17-576] 'use_project_ipc' is deprecated. This option is deprecated and no longer used. INFO: [Coretcl 2-1648] Added synthesis output to IP cache for IP AlgoOutputRAM, cache-ID = 4e6638cd007067d6 INFO: [Coretcl 2-1174] Renamed 20 cell refs. INFO: [Common 17-1381] The checkpoint '/fast/gitlab-runner-home/builds/t3_BwBuQ-/2/atlas-l1calo-efex/eFEXFirmware/Projects/efex_processor.1/efex_processor.1.runs/AlgoOutputRAM_synth_1/AlgoOutputRAM.dcp' has been generated. INFO: [runtcl-4] Executing : report_utilization -file AlgoOutputRAM_utilization_synth.rpt -pb AlgoOutputRAM_utilization_synth.pb INFO: [Common 17-206] Exiting Vivado at Sat Mar 8 22:20:01 2025...