## efex_processor.2 Synthesis Utilization report


                                                                                        
| **Site Type**    |    **Used** |   **Fixed** |    **Available** |    **Util%** |      
| ---    |         ---  |        --- |         ---  |             ---  |                
| Slice  LUTs*     |    182259   |   0         |    346400        |    52.62     |      
| Slice  Registers |    248613   |   0         |    692800        |    35.89     |      
| Block  RAM       Tile |        24  |         0    |             1180 |         2.03 | 
| DSPs   |         0    |        0   |         2880 |             0.00 |                
| Bonded IOB       |    499      |   0         |    600           |    83.17     |      
                                                                                        
## efex_processor.2 Implementation Utilization report


                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |    **Available** |    **Util%** |       
| ---    |         ---  |        ---   |         ---  |             ---  |                 
| Slice  LUTs      |    189986   |     0         |    346400        |    54.85     |       
| Slice  Registers |    273217   |     0         |    692800        |    39.44     |       
| Block  RAM       Tile |        758.5 |         0    |             1180 |         64.28 | 
| DSPs   |         96   |        0     |         2880 |             3.33 |                 
| Bonded IOB       |    447      |     447       |    600           |    74.50     |