Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2024.2 (lin64) Build 5239630 Fri Nov 08 22:34:34 MST 2024
| Date         : Sat Apr 26 19:50:58 2025
| Host         : runner-w-bkzzvvi-project-27372-concurrent-0-ksl2fh5g running 64-bit Ubuntu 22.04.5 LTS
| Command      : report_drc -file top_efex_control_drc_routed.rpt -pb top_efex_control_drc_routed.pb -rpx top_efex_control_drc_routed.rpx
| Design       : top_efex_control
| Device       : xc7vx330tffg1157-2
| Speed File   : -2
| Design State : Fully Routed
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Report DRC

Table of Contents
-----------------
1. REPORT SUMMARY
2. REPORT DETAILS

1. REPORT SUMMARY
-----------------
            Netlist: netlist
          Floorplan: design_1
      Design limits: <entire design considered>
           Ruledeck: default
             Max checks: <unlimited>
             Checks found: 163
+-----------+------------------+----------------------------+--------+
| Rule      | Severity         | Description                | Checks |
+-----------+------------------+----------------------------+--------+
| AVAL-326  | Critical Warning | Hard_block_must_have_LOC   | 2      |
| PDCN-1569 | Warning          | LUT equation term check    | 13     |
| PDRC-134  | Warning          | SLICE_PairEqSame_B6B5_WARN | 14     |
| PDRC-136  | Warning          | SLICE_PairEqSame_C6C5_WARN | 20     |
| PDRC-138  | Warning          | SLICE_PairEqSame_D6D5_WARN | 58     |
| PDRC-142  | Warning          | SLICE_PairEqSame_B6B5_WARN | 13     |
| PDRC-144  | Warning          | SLICE_PairEqSame_C6C5_WARN | 14     |
| PDRC-146  | Warning          | SLICE_PairEqSame_D6D5_WARN | 25     |
| REQP-45   | Warning          | must_use_ref_clock         | 3      |
| RTSTAT-10 | Warning          | No routable loads          | 1      |
+-----------+------------------+----------------------------+--------+

2. REPORT DETAILS
-----------------
AVAL-326#1 Critical Warning
Hard_block_must_have_LOC  
The hard block GTHE2_CHANNEL cell GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_6G4/MGT_GEN[0].mgt_quad_Rx_Tx/min_latency_1_quad_rx_tx_support_i/MGT_TX_RX_6G4_init_i/U0/MGT_TX_RX_6G4_i/gt2_MGT_TX_RX_6G4_i/gthe2_i is missing a valid LOC constraint for placement assignment, normally supplied by IP generation or manually assigned using the LOC property. Unguided placement of this block may cause problems in routing or other issues. Please check your design and set a valid LOC for this block to avoid these problems.
Related violations: <none>

AVAL-326#2 Critical Warning
Hard_block_must_have_LOC  
The hard block GTHE2_CHANNEL cell GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_6G4/MGT_GEN[0].mgt_quad_Rx_Tx/min_latency_1_quad_rx_tx_support_i/MGT_TX_RX_6G4_init_i/U0/MGT_TX_RX_6G4_i/gt3_MGT_TX_RX_6G4_i/gthe2_i is missing a valid LOC constraint for placement assignment, normally supplied by IP generation or manually assigned using the LOC property. Unguided placement of this block may cause problems in routing or other issues. Please check your design and set a valid LOC for this block to avoid these problems.
Related violations: <none>

PDCN-1569#1 Warning
LUT equation term check  
Used physical LUT pin 'A1' of cell GOLDEN_IF.readout_packet_block/TOB_sources[3].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/TOB_sources[3].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A6)+((~A6)*(~A5)*A3)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#2 Warning
LUT equation term check  
Used physical LUT pin 'A2' of cell GOLDEN_IF.readout_packet_block/TOB_sources[1].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/TOB_sources[1].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A5)+((~A5)*(~A3)*A4)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#3 Warning
LUT equation term check  
Used physical LUT pin 'A2' of cell dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.bscan_switch/temp_curid[31]_i_1 (pin dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.bscan_switch/temp_curid[31]_i_1/I1) is not included in the LUT equation: 'O5=(A3*A1)+(A3*(~A1)*(~A5))+((~A3))'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#4 Warning
LUT equation term check  
Used physical LUT pin 'A3' of cell GOLDEN_IF.hub2_axi_stream_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.hub2_axi_stream_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A6)+((~A6)*(~A5)*A2)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#5 Warning
LUT equation term check  
Used physical LUT pin 'A3' of cell GOLDEN_IF.readout_packet_block/Bulk_sources[0].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/Bulk_sources[0].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A1)+((~A1)*(~A5)*A2)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#6 Warning
LUT equation term check  
Used physical LUT pin 'A3' of cell GOLDEN_IF.readout_packet_block/Bulk_sources[1].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/Bulk_sources[1].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A4)+((~A4)*(~A6)*A5)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#7 Warning
LUT equation term check  
Used physical LUT pin 'A3' of cell dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.id_state[0]_i_1 (pin dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.id_state[0]_i_1/I0) is not included in the LUT equation: 'O6=(A6+~A6)*((A5))'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#8 Warning
LUT equation term check  
Used physical LUT pin 'A4' of cell GOLDEN_IF.readout_packet_block/Bulk_sources[2].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/Bulk_sources[2].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A5)+((~A5)*(~A3)*A1)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#9 Warning
LUT equation term check  
Used physical LUT pin 'A4' of cell GOLDEN_IF.readout_packet_block/Bulk_sources[3].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/Bulk_sources[3].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A6)+((~A6)*(~A3)*A1)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#10 Warning
LUT equation term check  
Used physical LUT pin 'A4' of cell dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.bscan_switch/temp_curid[31]_i_1 (pin dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.bscan_switch/temp_curid[31]_i_1/I0) is not included in the LUT equation: 'O5=(A3*A1)+(A3*(~A1)*(~A5))+((~A3))'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#11 Warning
LUT equation term check  
Used physical LUT pin 'A5' of cell GOLDEN_IF.hub1_axi_stream_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.hub1_axi_stream_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A4)+((~A4)*(~A6)*A3)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#12 Warning
LUT equation term check  
Used physical LUT pin 'A6' of cell GOLDEN_IF.readout_packet_block/TOB_sources[0].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/TOB_sources[0].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A5)+((~A5)*(~A2)*A4)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDCN-1569#13 Warning
LUT equation term check  
Used physical LUT pin 'A6' of cell GOLDEN_IF.readout_packet_block/TOB_sources[2].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1 (pin GOLDEN_IF.readout_packet_block/TOB_sources[2].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/gpregsm1.user_valid_i_1/I1) is not included in the LUT equation: 'O6=(A4)+((~A4)*(~A2)*A3)'. If this cell is a user instantiated LUT in the design, please remove connectivity to the pin or change the equation and/or INIT string of the LUT to prevent this issue. If the cell is inferred or IP created LUT, please regenerate the IP and/or resynthesize the design to attempt to correct the issue.
Related violations: <none>

PDRC-134#1 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X105Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#2 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X108Y74 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#3 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X111Y227 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#4 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X112Y91 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#5 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X115Y174 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#6 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X119Y195 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#7 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X137Y173 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#8 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X137Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#9 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X141Y79 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#10 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X147Y140 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#11 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X148Y156 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#12 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X52Y85 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#13 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X97Y93 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-134#14 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X99Y207 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#1 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X105Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#2 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X108Y74 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#3 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X111Y227 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#4 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X115Y174 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#5 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X119Y195 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#6 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X137Y173 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#7 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X137Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#8 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X141Y79 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#9 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X55Y232 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#10 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X56Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#11 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X56Y237 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#12 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X59Y232 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#13 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X60Y236 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#14 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X61Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#15 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X61Y238 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#16 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X64Y231 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#17 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X64Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#18 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X64Y237 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#19 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X85Y205 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-136#20 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X97Y93 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#1 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X105Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#2 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X105Y99 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#3 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X108Y148 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#4 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X108Y74 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#5 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X109Y148 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#6 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X115Y139 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#7 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X115Y174 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#8 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X116Y138 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#9 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X119Y153 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#10 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X119Y178 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#11 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X119Y195 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#12 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X120Y159 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#13 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X123Y103 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#14 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X125Y112 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#15 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X125Y180 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#16 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X128Y125 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#17 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X128Y164 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#18 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X129Y135 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#19 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X129Y145 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#20 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X131Y146 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#21 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X131Y160 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#22 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X133Y133 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#23 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X133Y162 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#24 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X137Y113 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#25 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X137Y123 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#26 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X137Y173 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#27 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X137Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#28 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X143Y154 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#29 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X143Y167 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#30 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X144Y162 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#31 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X145Y162 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#32 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X147Y88 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#33 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X148Y153 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#34 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X148Y162 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#35 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X47Y63 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#36 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X49Y110 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#37 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X53Y150 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#38 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X55Y128 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#39 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X55Y232 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#40 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X56Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#41 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X56Y237 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#42 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X57Y104 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#43 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X57Y171 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#44 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X59Y232 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#45 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X61Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#46 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X61Y238 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#47 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X64Y231 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#48 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X64Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#49 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X64Y237 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#50 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X65Y83 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#51 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X77Y86 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#52 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X81Y98 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#53 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X87Y96 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#54 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X88Y149 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#55 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X89Y149 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#56 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X97Y93 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#57 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X99Y101 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-138#58 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X99Y105 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#1 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X102Y160 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#2 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X114Y165 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#3 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X134Y192 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#4 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X136Y161 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#5 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X62Y156 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#6 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X62Y160 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#7 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X70Y152 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#8 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X72Y159 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#9 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X76Y166 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#10 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X94Y159 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#11 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X94Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#12 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X94Y70 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-142#13 Warning
SLICE_PairEqSame_B6B5_WARN  
Luts B6LUT and B5LUT in use in site SLICE_X96Y173 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#1 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X100Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#2 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X134Y192 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#3 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X136Y161 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#4 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X44Y207 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#5 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X54Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#6 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X62Y160 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#7 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X66Y234 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#8 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X70Y152 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#9 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X72Y159 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#10 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X76Y166 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#11 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X86Y216 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#12 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X94Y159 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#13 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X94Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-144#14 Warning
SLICE_PairEqSame_C6C5_WARN  
Luts C6LUT and C5LUT in use in site SLICE_X96Y173 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#1 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X106Y144 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#2 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X106Y99 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#3 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X122Y129 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#4 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X126Y157 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#5 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X134Y148 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#6 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X134Y192 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#7 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X136Y161 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#8 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X142Y142 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#9 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X44Y207 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#10 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X50Y103 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#11 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X50Y131 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#12 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X50Y156 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#13 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X54Y171 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#14 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X54Y233 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#15 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X62Y160 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#16 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X66Y234 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#17 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X70Y152 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#18 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X72Y159 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#19 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X76Y166 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#20 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X90Y99 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#21 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X94Y159 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#22 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X94Y202 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#23 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X94Y95 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#24 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X96Y173 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

PDRC-146#25 Warning
SLICE_PairEqSame_D6D5_WARN  
Luts D6LUT and D5LUT in use in site SLICE_X98Y105 with different equations without A6 pin connected to Global Logic High.
Related violations: <none>

REQP-45#1 Warning
must_use_ref_clock  
GTHE2_COMMON cell GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_6G4/MGT_GEN[0].mgt_quad_Rx_Tx/min_latency_1_quad_rx_tx_support_i/common0_i/gthe2_common_i: An input reference clock pin (GTREFCLK0, GTREFCLK1, GTNORTHREFCLK0, GTNORTHREFCLK1, GTSOUTHREFCLK0, GTSOUTHREFCLK1 and set QPLLREFCLKSEL[2:0] appropriately) must be used (unless this cell is just to set needed configuration).
Related violations: <none>

REQP-45#2 Warning
must_use_ref_clock  
GTHE2_COMMON cell GOLDEN_IF.top_aurora_hub1/aurora_core/aurora_module_i/gt_common_support/gthe2_common_lane1_i: An input reference clock pin (GTREFCLK0, GTREFCLK1, GTNORTHREFCLK0, GTNORTHREFCLK1, GTSOUTHREFCLK0, GTSOUTHREFCLK1 and set QPLLREFCLKSEL[2:0] appropriately) must be used (unless this cell is just to set needed configuration).
Related violations: <none>

REQP-45#3 Warning
must_use_ref_clock  
GTHE2_COMMON cell GOLDEN_IF.top_aurora_hub2/aurora_core/aurora_module_i/gt_common_support/gthe2_common_lane1_i: An input reference clock pin (GTREFCLK0, GTREFCLK1, GTNORTHREFCLK0, GTNORTHREFCLK1, GTSOUTHREFCLK0, GTSOUTHREFCLK1 and set QPLLREFCLKSEL[2:0] appropriately) must be used (unless this cell is just to set needed configuration).
Related violations: <none>

RTSTAT-10#1 Warning
No routable loads  
362 net(s) have no routable loads. The problem bus(es) and/or net(s) are GOLDEN_IF.hub1_axi_stream_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.hub2_axi_stream_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/Bulk_sources[0].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/Bulk_sources[1].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/Bulk_sources[2].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/Bulk_sources[3].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/TOB_sources[0].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/TOB_sources[1].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/TOB_sources[2].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
GOLDEN_IF.readout_packet_block/TOB_sources[3].MGT_object/mgt_fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
dbg_hub/inst/BSCANID.u_xsdbm_id/CORE_XSDB.UUT_MASTER/U_ICON_INTERFACE/U_CMD1/ctl_reg_en_2[1],
dbg_hub/inst/BSCANID.u_xsdbm_id/CORE_XSDB.UUT_MASTER/U_ICON_INTERFACE/U_CMD6_RD/U_RD_FIFO/SUBCORE_FIFO.xsdbm_v3_0_3_rdfifo_inst/inst_fifo_gen/gconvfifo.rf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i,
dbg_hub/inst/BSCANID.u_xsdbm_id/CORE_XSDB.UUT_MASTER/U_ICON_INTERFACE/U_CMD7_CTL/ctl_reg[2:0],
dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.bscan_inst/TMS,
eth/fifo/U0/inst_fifo_gen/gaxis_fifo.gaxisf.axisf/grf.rf/gntv_or_sync_fifo.gl0.rd/gr1.gr1_int.rfwft/aempty_fwft_i
 (the first 15 of 316 listed nets/buses).
Related violations: <none>


