Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
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| Tool Version     : Vivado v.2024.2 (lin64) Build 5239630 Fri Nov 08 22:34:34 MST 2024
| Date             : Mon Nov 10 19:58:03 2025
| Host             : runner-w-bkzzvvi-project-27372-concurrent-0-3q4o73qp running 64-bit Ubuntu 22.04.5 LTS
| Command          : report_power -file top_efex_control_power_routed.rpt -pb top_efex_control_power_summary_routed.pb -rpx top_efex_control_power_routed.rpx
| Design           : top_efex_control
| Device           : xc7vx330tffg1157-2
| Design State     : routed
| Grade            : commercial
| Process          : typical
| Characterization : Production
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Power Report

Table of Contents
-----------------
1. Summary
1.1 On-Chip Components
1.2 Power Supply Summary
1.3 Confidence Level
2. Settings
2.1 Environment
2.2 Clock Constraints
3. Detailed Reports
3.1 By Hierarchy

1. Summary
----------

+--------------------------+--------------+
| Total On-Chip Power (W)  | 9.456        |
| Design Power Budget (W)  | Unspecified* |
| Power Budget Margin (W)  | NA           |
| Dynamic (W)              | 9.112        |
| Device Static (W)        | 0.344        |
| Effective TJA (C/W)      | 1.4          |
| Max Ambient (C)          | 71.6         |
| Junction Temperature (C) | 38.4         |
| Confidence Level         | Low          |
| Setting File             | ---          |
| Simulation Activity File | ---          |
| Design Nets Matched      | NA           |
+--------------------------+--------------+
* Specify Design Power Budget using, set_operating_conditions -design_power_budget <value in Watts>


1.1 On-Chip Components
----------------------

+--------------------------+-----------+----------+-----------+-----------------+
| On-Chip                  | Power (W) | Used     | Available | Utilization (%) |
+--------------------------+-----------+----------+-----------+-----------------+
| Clocks                   |     0.730 |       69 |       --- |             --- |
| Slice Logic              |     0.267 |   124332 |       --- |             --- |
|   LUT as Logic           |     0.178 |    35934 |    204000 |           17.61 |
|   LUT as Distributed RAM |     0.050 |     1440 |     70200 |            2.05 |
|   Register               |     0.022 |    69687 |    408000 |           17.08 |
|   CARRY4                 |     0.016 |     3944 |     51000 |            7.73 |
|   LUT as Shift Register  |    <0.001 |     1419 |     70200 |            2.02 |
|   F7/F8 Muxes            |    <0.001 |      624 |    204000 |            0.31 |
|   BUFG                   |    <0.001 |        2 |        32 |            6.25 |
|   Others                 |     0.000 |     3464 |       --- |             --- |
| Signals                  |     0.497 |   102576 |       --- |             --- |
| Block RAM                |     1.714 |    364.5 |       750 |           48.60 |
| MMCM                     |     0.211 |        2 |        14 |           14.29 |
| I/O                      |     0.340 |      372 |       600 |           62.00 |
| GTH                      |     5.350 |       20 |       --- |             --- |
| XADC                     |    <0.001 |        1 |       --- |             --- |
| Static Power             |     0.344 |          |           |                 |
| Total                    |     9.456 |          |           |                 |
+--------------------------+-----------+----------+-----------+-----------------+


1.2 Power Supply Summary
------------------------

+-----------+-------------+-----------+-------------+------------+-------------+-------------+------------+
| Source    | Voltage (V) | Total (A) | Dynamic (A) | Static (A) | Powerup (A) | Budget (A)  | Margin (A) |
+-----------+-------------+-----------+-------------+------------+-------------+-------------+------------+
| Vccint    |       1.000 |     4.029 |       3.866 |      0.163 |       NA    | Unspecified | NA         |
| Vccaux    |       1.800 |     0.160 |       0.128 |      0.032 |       NA    | Unspecified | NA         |
| Vcco33    |       3.300 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| Vcco25    |       2.500 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| Vcco18    |       1.800 |     0.171 |       0.170 |      0.001 |       NA    | Unspecified | NA         |
| Vcco15    |       1.500 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| Vcco135   |       1.350 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| Vcco12    |       1.200 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| Vccaux_io |       1.800 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| Vccbram   |       1.000 |     0.165 |       0.144 |      0.021 |       NA    | Unspecified | NA         |
| MGTAVcc   |       1.000 |     3.149 |       3.100 |      0.050 |       NA    | Unspecified | NA         |
| MGTAVtt   |       1.200 |     1.201 |       1.189 |      0.013 |       NA    | Unspecified | NA         |
| MGTVccaux |       1.800 |     0.021 |       0.021 |      0.000 |       NA    | Unspecified | NA         |
| MGTZVccl  |       1.075 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| MGTZAVcc  |       1.075 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| MGTZVcch  |       1.800 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
| Vccadc    |       1.800 |     0.020 |       0.000 |      0.020 |       NA    | Unspecified | NA         |
+-----------+-------------+-----------+-------------+------------+-------------+-------------+------------+


1.3 Confidence Level
--------------------

+-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
| User Input Data             | Confidence | Details                                                | Action                                                                                                     |
+-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
| Design implementation state | High       | Design is routed                                       |                                                                                                            |
| Clock nodes activity        | High       | User specified more than 95% of clocks                 |                                                                                                            |
| I/O nodes activity          | Low        | More than 75% of inputs are missing user specification | Provide missing input activity with simulation results or by editing the "By Resource Type -> I/Os" view   |
| Internal nodes activity     | Medium     | User specified less than 25% of internal nodes         | Provide missing internal nodes activity with simulation results or by editing the "By Resource Type" views |
| Device models               | High       | Device models are Production                           |                                                                                                            |
|                             |            |                                                        |                                                                                                            |
| Overall confidence level    | Low        |                                                        |                                                                                                            |
+-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+


2. Settings
-----------

2.1 Environment
---------------

+-----------------------+--------------------------+
| Ambient Temp (C)      | 25.0                     |
| ThetaJA (C/W)         | 1.4                      |
| Airflow (LFM)         | 250                      |
| Heat Sink             | medium (Medium Profile)  |
| ThetaSA (C/W)         | 2.4                      |
| Board Selection       | medium (10"x10")         |
| # of Board Layers     | 12to15 (12 to 15 Layers) |
| Board Temperature (C) | 25.0                     |
+-----------------------+--------------------------+


2.2 Clock Constraints
---------------------

+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+
| Clock                                                                                                                                                                                      | Domain                                                                                                                                                                                     | Constraint (ns) |
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+
| CLKFBIN                                                                                                                                                                                    | clocks/CLKFBIN                                                                                                                                                                             |             8.0 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gt0_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gthe2_i/TXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gt0_txoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt1_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt1_mgt11g2_tx_rx_cfpga_i/gt1_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt2_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt2_mgt11g2_tx_rx_cfpga_i/gt2_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt3_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[0].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt3_mgt11g2_tx_rx_cfpga_i/gt3_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gt0_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gthe2_i/TXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt0_mgt11g2_tx_rx_cfpga_i/gt0_txoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt1_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt1_mgt11g2_tx_rx_cfpga_i/gt1_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt2_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt2_mgt11g2_tx_rx_cfpga_i/gt2_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt3_mgt11g2_tx_rx_cfpga_i/gthe2_i/RXOUTCLK | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_11G2/MGT_GEN[1].mgt_1quad_Rx_Tx/mgt11g2_tx_rx_cfpga_support_i/mgt11g2_tx_rx_cfpga_init_i/U0/mgt11g2_tx_rx_cfpga_i/gt3_mgt11g2_tx_rx_cfpga_i/gt3_rxoutclk_out |             3.6 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_6G4/MGT_GEN[0].mgt_quad_Rx_Tx/min_latency_1_quad_rx_tx_support_i/MGT_TX_RX_6G4_init_i/U0/MGT_TX_RX_6G4_i/gt0_MGT_TX_RX_6G4_i/gthe2_i/RXOUTCLK                | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_6G4/MGT_GEN[0].mgt_quad_Rx_Tx/min_latency_1_quad_rx_tx_support_i/MGT_TX_RX_6G4_init_i/U0/MGT_TX_RX_6G4_i/gt0_MGT_TX_RX_6G4_i/gt0_rxoutclk_out                |             6.2 |
| GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_6G4/MGT_GEN[0].mgt_quad_Rx_Tx/min_latency_1_quad_rx_tx_support_i/MGT_TX_RX_6G4_init_i/U0/MGT_TX_RX_6G4_i/gt0_MGT_TX_RX_6G4_i/gthe2_i/TXOUTCLK                | GOLDEN_IF.MGT_TX_RX/MGT_TX_RX_6G4/MGT_GEN[0].mgt_quad_Rx_Tx/min_latency_1_quad_rx_tx_support_i/MGT_TX_RX_6G4_init_i/U0/MGT_TX_RX_6G4_i/gt0_MGT_TX_RX_6G4_i/gt0_txoutclk_out                |             6.2 |
| GOLDEN_IF.top_aurora_hub1/aurora_core/aurora_module_i/efex_aurora_hub2_i/U0/gt_wrapper_i/efex_aurora_hub2_multi_gt_i/gt2_efex_aurora_hub2_i/gthe2_i/TXOUTCLK                               | GOLDEN_IF.top_aurora_hub1/aurora_core/aurora_module_i/efex_aurora_hub2_i/U0/gt_wrapper_i/efex_aurora_hub2_multi_gt_i/gt2_efex_aurora_hub2_i/TX_OUT_CLK                                     |             3.1 |
| GOLDEN_IF.top_aurora_hub2/aurora_core/aurora_module_i/efex_aurora_hub2_i/U0/gt_wrapper_i/efex_aurora_hub2_multi_gt_i/gt2_efex_aurora_hub2_i/gthe2_i/TXOUTCLK                               | GOLDEN_IF.top_aurora_hub2/aurora_core/aurora_module_i/efex_aurora_hub2_i/U0/gt_wrapper_i/efex_aurora_hub2_multi_gt_i/gt2_efex_aurora_hub2_i/TX_OUT_CLK                                     |             3.1 |
| I                                                                                                                                                                                          | clocks/I                                                                                                                                                                                   |             5.0 |
| aurora_hub1_refclk1_p                                                                                                                                                                      | ctrl_in[aurora_hub1_refclk1_p]                                                                                                                                                             |             6.2 |
| aurora_hub2_refclk1_p                                                                                                                                                                      | ctrl_in[aurora_hub2_refclk1_p]                                                                                                                                                             |             6.2 |
| clk320_clk_ttc                                                                                                                                                                             | ttc_clk/inst/clk320_clk_ttc                                                                                                                                                                |             3.1 |
| clk40_clk_ttc                                                                                                                                                                              | ttc_clk/inst/clk40_clk_ttc                                                                                                                                                                 |            25.0 |
| clk_40_p                                                                                                                                                                                   | clk_40_p                                                                                                                                                                                   |            25.0 |
| clkfbout_clk_ttc                                                                                                                                                                           | ttc_clk/inst/clkfbout_clk_ttc                                                                                                                                                              |            25.0 |
| dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.bscan_inst/SERIES7_BSCAN.bscan_inst/TCK                                                                                                 | dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_N_EXT_BSCAN.bscan_inst/TCK                                                                                                                          |            33.0 |
| gmii_rx_clk                                                                                                                                                                                | gmii_rx_clk                                                                                                                                                                                |             8.0 |
| gt_clk01                                                                                                                                                                                   | ctrl_in[Q_CLK_GTREFCLK_PAD_N_IN][0]                                                                                                                                                        |             6.2 |
| gt_clk02                                                                                                                                                                                   | ctrl_in[Q_CLK_GTREFCLK_PAD_N_IN][1]                                                                                                                                                        |             6.2 |
| gt_clk03                                                                                                                                                                                   | ctrl_in[Q_CLK_GTREFCLK_PAD_N_IN][2]                                                                                                                                                        |             6.2 |
| ipb_clk                                                                                                                                                                                    | clocks/clk_ipb_i                                                                                                                                                                           |            32.0 |
| mac_clk                                                                                                                                                                                    | clocks/clk_125_i                                                                                                                                                                           |             8.0 |
| sysclk                                                                                                                                                                                     | gt_clk125_p                                                                                                                                                                                |             8.0 |
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+


3. Detailed Reports
-------------------

3.1 By Hierarchy
----------------

+------------------------------------------------+-----------+
| Name                                           | Power (W) |
+------------------------------------------------+-----------+
| top_efex_control                               |     9.112 |
|   GOLDEN_IF.MGT_TX_RX                          |     3.582 |
|     MGT_TX_RX_11G2                             |     2.579 |
|       MGT_GEN[0].mgt_1quad_Rx_Tx               |     1.289 |
|       MGT_GEN[1].mgt_1quad_Rx_Tx               |     1.290 |
|     MGT_TX_RX_6G4                              |     0.994 |
|       MGT_GEN[0].mgt_quad_Rx_Tx                |     0.994 |
|   GOLDEN_IF.backplane_reg                      |     0.021 |
|   GOLDEN_IF.combined_ttc_ila                   |     0.015 |
|     U0                                         |     0.015 |
|       ila_core_inst                            |     0.015 |
|   GOLDEN_IF.crc_checker_hub1                   |     0.003 |
|     crc_sm                                     |     0.002 |
|   GOLDEN_IF.crc_checker_hub2                   |     0.003 |
|     crc_sm                                     |     0.001 |
|   GOLDEN_IF.crc_ila_hub1                       |     0.018 |
|     U0                                         |     0.018 |
|       ila_core_inst                            |     0.018 |
|   GOLDEN_IF.hub1_axi_stream_fifo               |     0.008 |
|     U0                                         |     0.008 |
|       inst_fifo_gen                            |     0.008 |
|   GOLDEN_IF.hub1_ufc_block                     |     0.001 |
|   GOLDEN_IF.hub2_axi_stream_fifo               |     0.015 |
|     U0                                         |     0.015 |
|       inst_fifo_gen                            |     0.015 |
|   GOLDEN_IF.hub2_ufc_block                     |     0.001 |
|   GOLDEN_IF.mgt_slaves                         |     0.031 |
|     quad_0                                     |     0.007 |
|       MGT_GT0                                  |     0.002 |
|       MGT_GT1                                  |     0.002 |
|       MGT_GT2                                  |     0.001 |
|       MGT_GT3                                  |     0.001 |
|     quad_1                                     |     0.012 |
|       MGT_GT0                                  |     0.003 |
|       MGT_GT1                                  |     0.003 |
|       MGT_GT2                                  |     0.003 |
|       MGT_GT3                                  |     0.003 |
|     quad_2                                     |     0.012 |
|       MGT_GT0                                  |     0.003 |
|       MGT_GT1                                  |     0.003 |
|       MGT_GT2                                  |     0.003 |
|       MGT_GT3                                  |     0.003 |
|   GOLDEN_IF.output_channel1_ila                |     0.029 |
|     U0                                         |     0.029 |
|       ila_core_inst                            |     0.029 |
|   GOLDEN_IF.output_channel2_ila                |     0.028 |
|     U0                                         |     0.028 |
|       ila_core_inst                            |     0.027 |
|   GOLDEN_IF.readout_packet_block               |     2.822 |
|     Bulk_sources[0].MGT_object                 |     0.013 |
|       IPbus_RAM                                |     0.001 |
|       MGT_receiver                             |     0.003 |
|       mgt_fifo                                 |     0.004 |
|     Bulk_sources[0].raw_fifo_A                 |     0.009 |
|     Bulk_sources[0].raw_fifo_B                 |     0.009 |
|     Bulk_sources[0].raw_fifo_selector          |     0.008 |
|     Bulk_sources[0].raw_ram_fifo               |     0.107 |
|     Bulk_sources[1].MGT_object                 |     0.015 |
|       IPbus_RAM                                |     0.001 |
|       MGT_receiver                             |     0.003 |
|       mgt_fifo                                 |     0.004 |
|     Bulk_sources[1].raw_fifo_A                 |     0.009 |
|     Bulk_sources[1].raw_fifo_B                 |     0.010 |
|     Bulk_sources[1].raw_fifo_selector          |     0.006 |
|     Bulk_sources[1].raw_ram_fifo               |     0.106 |
|     Bulk_sources[2].MGT_object                 |     0.014 |
|       IPbus_RAM                                |     0.002 |
|       MGT_receiver                             |     0.003 |
|       mgt_fifo                                 |     0.004 |
|     Bulk_sources[2].raw_fifo_A                 |     0.010 |
|     Bulk_sources[2].raw_fifo_B                 |     0.009 |
|     Bulk_sources[2].raw_fifo_selector          |     0.006 |
|     Bulk_sources[2].raw_ram_fifo               |     0.107 |
|     Bulk_sources[3].MGT_object                 |     0.015 |
|       IPbus_RAM                                |     0.001 |
|       MGT_receiver                             |     0.003 |
|       mgt_fifo                                 |     0.005 |
|     Bulk_sources[3].raw_fifo_A                 |     0.011 |
|     Bulk_sources[3].raw_fifo_B                 |     0.012 |
|     Bulk_sources[3].raw_fifo_selector          |     0.011 |
|     Bulk_sources[3].raw_ram_fifo               |     0.115 |
|     IPBusblock                                 |     0.280 |
|       U1_rdout_ipb_slave                       |     0.152 |
|       U2_rdout_err_cnt                         |     0.042 |
|       U3_monitoring_block                      |     0.059 |
|       packet_tide_mark_block                   |     0.010 |
|     MUX_registers[0].MUX_register_A            |     0.003 |
|     MUX_registers[0].MUX_register_B            |     0.004 |
|     MUX_registers[1].MUX_register_A            |     0.003 |
|     MUX_registers[1].MUX_register_B            |     0.004 |
|     MUX_registers[2].MUX_register_A            |     0.003 |
|     MUX_registers[2].MUX_register_B            |     0.004 |
|     MUX_registers[3].MUX_register_A            |     0.003 |
|     MUX_registers[3].MUX_register_B            |     0.004 |
|     MUX_registers[4].MUX_register_A            |     0.004 |
|     MUX_registers[4].MUX_register_B            |     0.003 |
|     MUX_registers[5].MUX_register_A            |     0.003 |
|     MUX_registers[5].MUX_register_B            |     0.003 |
|     Merged_FIFOs[0].merged_fifo_A              |     0.118 |
|       data_fifo                                |     0.009 |
|       data_ram_fifo                            |     0.109 |
|     Merged_FIFOs[0].merged_fifo_B              |     0.137 |
|       data_fifo                                |     0.014 |
|       data_ram_fifo                            |     0.123 |
|     Merged_FIFOs[1].merged_fifo_A              |     0.138 |
|       data_fifo                                |     0.013 |
|       data_ram_fifo                            |     0.124 |
|     Merged_FIFOs[1].merged_fifo_B              |     0.135 |
|       data_fifo                                |     0.015 |
|       data_ram_fifo                            |     0.120 |
|     Packet_MUX_A                               |     0.002 |
|     Packet_MUX_B                               |     0.001 |
|     Packet_builders[0].Packet_Builder          |     0.026 |
|       crc20_block                              |     0.011 |
|       crc9_block                               |     0.003 |
|     Packet_builders[0].Packet_Builder_register |     0.003 |
|     Packet_builders[0].built_fifo_spy          |     0.009 |
|       IPbus_RAM                                |     0.006 |
|     Packet_builders[1].Packet_Builder          |     0.035 |
|       crc20_block                              |     0.015 |
|       crc9_block                               |     0.004 |
|     Packet_builders[1].Packet_Builder_register |     0.003 |
|     Packet_builders[1].built_fifo_spy          |     0.011 |
|       IPbus_RAM                                |     0.007 |
|     TOB_sources[0].MGT_object                  |     0.035 |
|       IPbus_RAM                                |     0.001 |
|       MGT_receiver                             |     0.003 |
|       ila_block.mgt_ila                        |     0.019 |
|       mgt_fifo                                 |     0.005 |
|     TOB_sources[0].TOB_register_A              |     0.003 |
|     TOB_sources[0].TOB_register_B              |     0.003 |
|     TOB_sources[0].tob_fifo_A                  |     0.126 |
|       data_fifo                                |     0.010 |
|       data_ram_fifo                            |     0.116 |
|     TOB_sources[0].tob_fifo_B                  |     0.126 |
|       data_fifo                                |     0.010 |
|       data_ram_fifo                            |     0.116 |
|     TOB_sources[1].MGT_object                  |     0.036 |
|       IPbus_RAM                                |     0.001 |
|       MGT_receiver                             |     0.003 |
|       ila_block.mgt_ila                        |     0.020 |
|       mgt_fifo                                 |     0.005 |
|     TOB_sources[1].TOB_register_A              |     0.003 |
|     TOB_sources[1].TOB_register_B              |     0.003 |
|     TOB_sources[1].tob_fifo_A                  |     0.130 |
|       data_fifo                                |     0.010 |
|       data_ram_fifo                            |     0.120 |
|     TOB_sources[1].tob_fifo_B                  |     0.131 |
|       data_fifo                                |     0.010 |
|       data_ram_fifo                            |     0.121 |
|     TOB_sources[2].MGT_object                  |     0.034 |
|       IPbus_RAM                                |     0.001 |
|       MGT_receiver                             |     0.003 |
|       ila_block.mgt_ila                        |     0.019 |
|       mgt_fifo                                 |     0.004 |
|     TOB_sources[2].TOB_register_A              |     0.003 |
|     TOB_sources[2].TOB_register_B              |     0.003 |
|     TOB_sources[2].tob_fifo_A                  |     0.132 |
|       data_fifo                                |     0.010 |
|       data_ram_fifo                            |     0.122 |
|     TOB_sources[2].tob_fifo_B                  |     0.131 |
|       data_fifo                                |     0.011 |
|       data_ram_fifo                            |     0.120 |
|     TOB_sources[3].MGT_object                  |     0.035 |
|       IPbus_RAM                                |     0.001 |
|       MGT_receiver                             |     0.003 |
|       ila_block.mgt_ila                        |     0.019 |
|       mgt_fifo                                 |     0.005 |
|     TOB_sources[3].TOB_register_A              |     0.004 |
|     TOB_sources[3].TOB_register_B              |     0.003 |
|     TOB_sources[3].tob_fifo_A                  |     0.134 |
|       data_fifo                                |     0.013 |
|       data_ram_fifo                            |     0.121 |
|     TOB_sources[3].tob_fifo_B                  |     0.128 |
|       data_fifo                                |     0.010 |
|       data_ram_fifo                            |     0.118 |
|     tob_merge_A                                |     0.023 |
|       Debug_MUX                                |     0.003 |
|       TOB_merger                               |     0.002 |
|       TOB_sources[0].tob_processer             |     0.003 |
|       TOB_sources[1].tob_processer             |     0.003 |
|       TOB_sources[2].tob_processer             |     0.003 |
|       TOB_sources[3].tob_processer             |     0.003 |
|     tob_merge_B                                |     0.024 |
|       Debug_MUX                                |     0.003 |
|       TOB_merger                               |     0.002 |
|       TOB_sources[0].tob_processer             |     0.003 |
|       TOB_sources[1].tob_processer             |     0.003 |
|       TOB_sources[2].tob_processer             |     0.003 |
|       TOB_sources[3].tob_processer             |     0.003 |
|     tob_spy_A                                  |     0.005 |
|       debug_spy                                |     0.004 |
|     tob_spy_B                                  |     0.006 |
|       debug_spy                                |     0.004 |
|   GOLDEN_IF.synch_hub2_combined_ttc            |     0.005 |
|     synch_1                                    |     0.005 |
|   GOLDEN_IF.synch_ttc_combined                 |     0.006 |
|     synch_1                                    |     0.005 |
|   GOLDEN_IF.top_aurora_hub1                    |     0.932 |
|     aurora_core                                |     0.930 |
|       aurora_module_i                          |     0.930 |
|     reset_timer                                |     0.001 |
|   GOLDEN_IF.top_aurora_hub2                    |     0.930 |
|     aurora_core                                |     0.929 |
|       aurora_module_i                          |     0.929 |
|     reset_timer                                |     0.001 |
|   U_0                                          |     0.066 |
|     U_5                                        |     0.062 |
|       trans                                    |     0.019 |
|       udp_if                                   |     0.043 |
|   clocks                                       |     0.115 |
|     clkdiv                                     |     0.001 |
|   dbg_hub                                      |     0.008 |
|     inst                                       |     0.008 |
|       BSCANID.u_xsdbm_id                       |     0.008 |
|   eth                                          |     0.027 |
|     emac0                                      |     0.025 |
|       U0                                       |     0.025 |
|   infrastructure_control                       |     0.014 |
|     spi_flash                                  |     0.005 |
|       spi_dpram_out                            |     0.002 |
|       spi_engine                               |     0.002 |
|     spi_pll                                    |     0.005 |
|       spi_dpram_out                            |     0.003 |
|       spi_engine                               |     0.001 |
|     xadc                                       |     0.001 |
|       adc_inst                                 |     0.001 |
|   ttc_clk                                      |     0.109 |
|     inst                                       |     0.109 |
+------------------------------------------------+-----------+


