My Project  v0.0.16
Variables
atlys.ucf File Reference

Constraints

sysclk  LOC = L15 | IOSTANDARD = LVCMOS33 | TNM_NET = tnm_sysclk
TS_sysclk  PERIOD tnm_sysclk 100MHz
ipb_clk  TNM_NET = tnm_ipb_clk
clk125  TNM_NET = tnm_clk125
TS_tig_ipb_125  FROM tnm_ipb_clk TO tnm_clk125 TIG
TS_tig_125_ipb  FROM tnm_clk125 TO tnm_ipb_clk TIG
clocks/rst  TIG
clocks/nuke_i  TIG
leds<0>  LOC = U18 | IOSTANDARD = LVCMOS25
leds<1>  LOC = M14 | IOSTANDARD = LVCMOS25
leds<2>  LOC = N14 | IOSTANDARD = LVCMOS25
leds<3>  LOC = L14 | IOSTANDARD = LVCMOS25
dip_switch<0>  LOC = A10 | IOSTANDARD = LVCMOS25
dip_switch<1>  LOC = D14 | IOSTANDARD = LVCMOS25
dip_switch<2>  LOC = C14 | IOSTANDARD = LVCMOS25
dip_switch<3>  LOC = P15 | IOSTANDARD = LVCMOS25
TG_gmii_tx  PADS ( " gmii_tx* " )
TG_gmii_tx  FSET = OUT AFTER sysclk REFERENCE_PIN " gmii_gtx_clk " RISING
gmii_gtx_clk  LOC = L12 | IOSTANDARD = LVCMOS25 | SLEW = FAST
gmii_txd<0>  LOC = H16 | IOSTANDARD = LVCMOS25
gmii_txd<1>  LOC = H13 | IOSTANDARD = LVCMOS25
gmii_txd<2>  LOC = K14 | IOSTANDARD = LVCMOS25
gmii_txd<3>  LOC = K13 | IOSTANDARD = LVCMOS25
gmii_txd<4>  LOC = J13 | IOSTANDARD = LVCMOS25
gmii_txd<5>  LOC = G14 | IOSTANDARD = LVCMOS25
gmii_txd<6>  LOC = H12 | IOSTANDARD = LVCMOS25
gmii_txd<7>  LOC = K12 | IOSTANDARD = LVCMOS25
gmii_tx_en  LOC = H15 | IOSTANDARD = LVCMOS25
gmii_tx_er  LOC = G18 | IOSTANDARD = LVCMOS25
gmii_rx_clk  LOC = K15 | IOSTANDARD = LVCMOS25 | TNM_NET = " gmii_rx_clk "
"TS_GMII_RX_CLK"  PERIOD " gmii_rx_clk " 125MHz
OFFSET  IN 2 .5ns VALID 3ns BEFORE gmii_rx_clk
gmii_rxd<0>  LOC = G16 | IOSTANDARD = LVCMOS25
gmii_rxd<1>  LOC = H14 | IOSTANDARD = LVCMOS25
gmii_rxd<2>  LOC = E16 | IOSTANDARD = LVCMOS25
gmii_rxd<3>  LOC = F15 | IOSTANDARD = LVCMOS25
gmii_rxd<4>  LOC = F14 | IOSTANDARD = LVCMOS25
gmii_rxd<5>  LOC = E18 | IOSTANDARD = LVCMOS25
gmii_rxd<6>  LOC = D18 | IOSTANDARD = LVCMOS25
gmii_rxd<7>  LOC = D17 | IOSTANDARD = LVCMOS25
gmii_rx_dv  LOC = F17 | IOSTANDARD = LVCMOS25
gmii_rx_er  LOC = F18 | IOSTANDARD = LVCMOS25
eth/*iodelay*  IDELAY_VALUE = 10
phy_rstb  LOC = G13 | IOSTANDARD = LVCMOS25

Variable Documentation

◆ "TS_GMII_RX_CLK"

"TS_GMII_RX_CLK" PERIOD " gmii_rx_clk " 125MHz
Constraints

◆ clk125

clk125 TNM_NET = tnm_clk125
Constraints

◆ clocks/nuke_i

clocks/nuke_i TIG
Constraints

◆ clocks/rst

clocks/rst TIG
Constraints

◆ dip_switch<0>

dip_switch<0> LOC = A10 | IOSTANDARD = LVCMOS25
Constraints

◆ dip_switch<1>

dip_switch<1> LOC = D14 | IOSTANDARD = LVCMOS25
Constraints

◆ dip_switch<2>

dip_switch<2> LOC = C14 | IOSTANDARD = LVCMOS25
Constraints

◆ dip_switch<3>

dip_switch<3> LOC = P15 | IOSTANDARD = LVCMOS25
Constraints

◆ eth/*iodelay*

eth/*iodelay* IDELAY_VALUE = 10
Constraints

◆ gmii_gtx_clk

gmii_gtx_clk LOC = L12 | IOSTANDARD = LVCMOS25 | SLEW = FAST
Constraints

◆ gmii_rx_clk

gmii_rx_clk LOC = K15 | IOSTANDARD = LVCMOS25 | TNM_NET = " gmii_rx_clk "
Constraints

◆ gmii_rx_dv

gmii_rx_dv LOC = F17 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rx_er

gmii_rx_er LOC = F18 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<0>

gmii_rxd<0> LOC = G16 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<1>

gmii_rxd<1> LOC = H14 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<2>

gmii_rxd<2> LOC = E16 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<3>

gmii_rxd<3> LOC = F15 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<4>

gmii_rxd<4> LOC = F14 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<5>

gmii_rxd<5> LOC = E18 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<6>

gmii_rxd<6> LOC = D18 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_rxd<7>

gmii_rxd<7> LOC = D17 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_tx_en

gmii_tx_en LOC = H15 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_tx_er

gmii_tx_er LOC = G18 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<0>

gmii_txd<0> LOC = H16 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<1>

gmii_txd<1> LOC = H13 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<2>

gmii_txd<2> LOC = K14 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<3>

gmii_txd<3> LOC = K13 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<4>

gmii_txd<4> LOC = J13 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<5>

gmii_txd<5> LOC = G14 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<6>

gmii_txd<6> LOC = H12 | IOSTANDARD = LVCMOS25
Constraints

◆ gmii_txd<7>

gmii_txd<7> LOC = K12 | IOSTANDARD = LVCMOS25
Constraints

◆ ipb_clk

ipb_clk TNM_NET = tnm_ipb_clk
Constraints

◆ leds<0>

leds<0> LOC = U18 | IOSTANDARD = LVCMOS25
Constraints

◆ leds<1>

leds<1> LOC = M14 | IOSTANDARD = LVCMOS25
Constraints

◆ leds<2>

leds<2> LOC = N14 | IOSTANDARD = LVCMOS25
Constraints

◆ leds<3>

leds<3> LOC = L14 | IOSTANDARD = LVCMOS25
Constraints

◆ OFFSET

OFFSET IN 2 .5ns VALID 3ns BEFORE gmii_rx_clk
Constraints

◆ phy_rstb

phy_rstb LOC = G13 | IOSTANDARD = LVCMOS25
Constraints

◆ sysclk

sysclk LOC = L15 | IOSTANDARD = LVCMOS33 | TNM_NET = tnm_sysclk
Constraints

◆ TG_gmii_tx [1/2]

TG_gmii_tx PADS ( " gmii_tx* " )
Constraints

◆ TG_gmii_tx [2/2]

TG_gmii_tx FSET = OUT AFTER sysclk REFERENCE_PIN " gmii_gtx_clk " RISING
Constraints

◆ TS_sysclk

TS_sysclk PERIOD tnm_sysclk 100MHz
Constraints

◆ TS_tig_125_ipb

TS_tig_125_ipb FROM tnm_clk125 TO tnm_ipb_clk TIG
Constraints

◆ TS_tig_ipb_125

TS_tig_ipb_125 FROM tnm_ipb_clk TO tnm_clk125 TIG
Constraints
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