ATCA Entity Reference

Inheritance diagram for ATCA:

Entities
Behavioral	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
std_logic_unsigned

Ports
CPLD_CLK	in std_logic
HW_ADDR	in std_logic_vector ( 7 downto 0 )
FORCE_MASTER_n	in std_logic
PL29_Link1_n	in std_logic
HW_ADDR_BUF	out std_logic_vector ( 4 downto 0 )
IN_SHELF0_n	out std_logic
CLOCK_MASTER_n	out std_logic
SELECT_HUB_n	out std_logic
DRIVE_INFO_n	out std_logic
DRIVE_CLOCK_n	out std_logic
FP_IPBUS_n	out std_logic
FP_IPMC_n	out std_logic
HUB1_LED_n	out std_logic
NODE_LED_n	out std_logic
AERR_LED_n	out std_logic

Member Data Documentation

AERR_LED_n

AERR_LED_n out std_logic

Port

CLOCK_MASTER_n

CLOCK_MASTER_n out std_logic

Port

CPLD_CLK

CPLD_CLK in std_logic

Port

DRIVE_CLOCK_n

DRIVE_CLOCK_n out std_logic

Port

DRIVE_INFO_n

DRIVE_INFO_n out std_logic

Port

FORCE_MASTER_n

FORCE_MASTER_n in std_logic

Port

FP_IPBUS_n

FP_IPBUS_n out std_logic

Port

FP_IPMC_n

FP_IPMC_n out std_logic

Port

HUB1_LED_n

HUB1_LED_n out std_logic

Port

HW_ADDR

HW_ADDR in std_logic_vector ( 7 downto 0 )

Port

HW_ADDR_BUF

HW_ADDR_BUF out std_logic_vector ( 4 downto 0 )

Port

IEEE

IEEE

Library

IN_SHELF0_n

IN_SHELF0_n out std_logic

Port

NODE_LED_n

NODE_LED_n out std_logic

Port

PL29_Link1_n

PL29_Link1_n in std_logic

Port

SELECT_HUB_n

SELECT_HUB_n out std_logic

Port

STD_LOGIC_1164

STD_LOGIC_1164

Package

std_logic_unsigned

std_logic_unsigned

Package

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The documentation for this class was generated from the following file:

• FTM/CPLDs/ATCA/ATCA.vhd