RTL Architecture Reference

Components
CON_2QUADS_6G4_CLOCK_MODULE

Signals
tied_to_ground_i	std_logic
tied_to_vcc_i	std_logic
gt0_txoutclk_i	std_logic
gt0_rxoutclk_i	std_logic
gt1_txoutclk_i	std_logic
gt1_rxoutclk_i	std_logic
gt2_txoutclk_i	std_logic
gt2_rxoutclk_i	std_logic
gt3_txoutclk_i	std_logic
gt3_rxoutclk_i	std_logic
gt4_txoutclk_i	std_logic
gt4_rxoutclk_i	std_logic
gt5_txoutclk_i	std_logic
gt5_rxoutclk_i	std_logic
gt6_txoutclk_i	std_logic
gt6_rxoutclk_i	std_logic
gt7_txoutclk_i	std_logic
gt7_rxoutclk_i	std_logic
q2_clk1_gtrefclk	std_logic
q3_clk1_gtrefclk	std_logic
gt0_txusrclk_i	std_logic
gt0_rxusrclk_i	std_logic
gt4_txusrclk_i	std_logic
gt4_rxusrclk_i	std_logic

Attributes
syn_noclockbuf	boolean
syn_noclockbuf	q2_clk1_gtrefclk : signal is true
syn_noclockbuf	q3_clk1_gtrefclk : signal is true

Instantiations
ibufds_instq2_clk1	ibufds_gte2
ibufds_instq3_clk1	ibufds_gte2
txoutclk_bufg0_i	bufg
rxoutclk_bufg1_i	bufg
txoutclk_bufg2_i	bufg
rxoutclk_bufg3_i	bufg

Member Data Documentation

CON_2QUADS_6G4_CLOCK_MODULE

CON_2QUADS_6G4_CLOCK_MODULE

Component

gt0_rxoutclk_i

gt0_rxoutclk_i std_logic

Signal

gt0_rxusrclk_i

gt0_rxusrclk_i std_logic

Signal

gt0_txoutclk_i

gt0_txoutclk_i std_logic

Signal

gt0_txusrclk_i

gt0_txusrclk_i std_logic

Signal

gt1_rxoutclk_i

gt1_rxoutclk_i std_logic

Signal

gt1_txoutclk_i

gt1_txoutclk_i std_logic

Signal

gt2_rxoutclk_i

gt2_rxoutclk_i std_logic

Signal

gt2_txoutclk_i

gt2_txoutclk_i std_logic

Signal

gt3_rxoutclk_i

gt3_rxoutclk_i std_logic

Signal

gt3_txoutclk_i

gt3_txoutclk_i std_logic

Signal

gt4_rxoutclk_i

gt4_rxoutclk_i std_logic

Signal

gt4_rxusrclk_i

gt4_rxusrclk_i std_logic

Signal

gt4_txoutclk_i

gt4_txoutclk_i std_logic

Signal

gt4_txusrclk_i

gt4_txusrclk_i std_logic

Signal

gt5_rxoutclk_i

gt5_rxoutclk_i std_logic

Signal

gt5_txoutclk_i

gt5_txoutclk_i std_logic

Signal

gt6_rxoutclk_i

gt6_rxoutclk_i std_logic

Signal

gt6_txoutclk_i

gt6_txoutclk_i std_logic

Signal

gt7_rxoutclk_i

gt7_rxoutclk_i std_logic

Signal

gt7_txoutclk_i

gt7_txoutclk_i std_logic

Signal

ibufds_instq2_clk1

ibufds_instq2_clk1 ibufds_gte2

Instantiation

ibufds_instq3_clk1

ibufds_instq3_clk1 ibufds_gte2

Instantiation

q2_clk1_gtrefclk

q2_clk1_gtrefclk std_logic

Signal

q3_clk1_gtrefclk

q3_clk1_gtrefclk std_logic

Signal

rxoutclk_bufg1_i

rxoutclk_bufg1_i bufg

Instantiation

rxoutclk_bufg3_i

rxoutclk_bufg3_i bufg

Instantiation

syn_noclockbuf [1/3]

syn_noclockbuf boolean

Attribute

syn_noclockbuf [2/3]

syn_noclockbuf q2_clk1_gtrefclk : signal is true

Attribute

syn_noclockbuf [3/3]

syn_noclockbuf q3_clk1_gtrefclk : signal is true

Attribute

tied_to_ground_i

tied_to_ground_i std_logic

Signal

tied_to_vcc_i

tied_to_vcc_i std_logic

Signal

txoutclk_bufg0_i

txoutclk_bufg0_i bufg

Instantiation

txoutclk_bufg2_i

txoutclk_bufg2_i bufg

Instantiation

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The documentation for this class was generated from the following file:

• FTM/Control/mgts/CON_2Quads_6g4/con_2quads_6g4_gt_usrclk_source.vhd