My Project  v0.0.16
Generics | Ports | Libraries | Use Clauses
V6_GTXWIZARD Entity Reference
Inheritance diagram for V6_GTXWIZARD:
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Collaboration diagram for V6_GTXWIZARD:
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Entities

RTL  architecture
 

Libraries

ieee 
UNISIM 

Use Clauses

std_logic_1164 
numeric_std 
VCOMPONENTS 

Generics

WRAPPER_SIM_GTXRESET_SPEEDUP  integer := 0

Ports

GTX0_DOUBLE_RESET_CLK_IN   in std_logic
GTX0_LOOPBACK_IN   in std_logic_vector ( 2 downto 0 )
GTX0_RXPOWERDOWN_IN   in std_logic_vector ( 1 downto 0 )
GTX0_TXPOWERDOWN_IN   in std_logic_vector ( 1 downto 0 )
GTX0_RXCHARISCOMMA_OUT   out std_logic
GTX0_RXCHARISK_OUT   out std_logic
GTX0_RXDISPERR_OUT   out std_logic
GTX0_RXNOTINTABLE_OUT   out std_logic
GTX0_RXRUNDISP_OUT   out std_logic
GTX0_RXCLKCORCNT_OUT   out std_logic_vector ( 2 downto 0 )
GTX0_RXENMCOMMAALIGN_IN   in std_logic
GTX0_RXENPCOMMAALIGN_IN   in std_logic
GTX0_RXDATA_OUT   out std_logic_vector ( 7 downto 0 )
GTX0_RXRECCLK_OUT   out std_logic
GTX0_RXRESET_IN   in std_logic
GTX0_RXUSRCLK2_IN   in std_logic
GTX0_RXELECIDLE_OUT   out std_logic
GTX0_RXN_IN   in std_logic
GTX0_RXP_IN   in std_logic
GTX0_RXBUFRESET_IN   in std_logic
GTX0_RXBUFSTATUS_OUT   out std_logic_vector ( 2 downto 0 )
GTX0_GTXRXRESET_IN   in std_logic
GTX0_MGTREFCLKRX_IN   in std_logic
GTX0_PLLRXRESET_IN   in std_logic
GTX0_RXPLLLKDET_OUT   out std_logic
GTX0_RXRESETDONE_OUT   out std_logic
GTX0_TXCHARDISPMODE_IN   in std_logic
GTX0_TXCHARDISPVAL_IN   in std_logic
GTX0_TXCHARISK_IN   in std_logic
GTX0_GTXTEST_IN   in std_logic_vector ( 12 downto 0 )
GTX0_TXDATA_IN   in std_logic_vector ( 7 downto 0 )
GTX0_TXOUTCLK_OUT   out std_logic
GTX0_TXRESET_IN   in std_logic
GTX0_TXUSRCLK2_IN   in std_logic
GTX0_TXN_OUT   out std_logic
GTX0_TXP_OUT   out std_logic
GTX0_TXBUFSTATUS_OUT   out std_logic_vector ( 1 downto 0 )
GTX0_GTXTXRESET_IN   in std_logic
GTX0_TXRESETDONE_OUT   out std_logic

Member Data Documentation

◆ GTX0_DOUBLE_RESET_CLK_IN

GTX0_DOUBLE_RESET_CLK_IN in std_logic
Port

◆ GTX0_GTXRXRESET_IN

GTX0_GTXRXRESET_IN in std_logic
Port

◆ GTX0_GTXTEST_IN

GTX0_GTXTEST_IN in std_logic_vector ( 12 downto 0 )
Port

◆ GTX0_GTXTXRESET_IN

GTX0_GTXTXRESET_IN in std_logic
Port

◆ GTX0_LOOPBACK_IN

GTX0_LOOPBACK_IN in std_logic_vector ( 2 downto 0 )
Port

◆ GTX0_MGTREFCLKRX_IN

GTX0_MGTREFCLKRX_IN in std_logic
Port

◆ GTX0_PLLRXRESET_IN

GTX0_PLLRXRESET_IN in std_logic
Port

◆ GTX0_RXBUFRESET_IN

GTX0_RXBUFRESET_IN in std_logic
Port

◆ GTX0_RXBUFSTATUS_OUT

GTX0_RXBUFSTATUS_OUT out std_logic_vector ( 2 downto 0 )
Port

◆ GTX0_RXCHARISCOMMA_OUT

GTX0_RXCHARISCOMMA_OUT out std_logic
Port

◆ GTX0_RXCHARISK_OUT

GTX0_RXCHARISK_OUT out std_logic
Port

◆ GTX0_RXCLKCORCNT_OUT

GTX0_RXCLKCORCNT_OUT out std_logic_vector ( 2 downto 0 )
Port

◆ GTX0_RXDATA_OUT

GTX0_RXDATA_OUT out std_logic_vector ( 7 downto 0 )
Port

◆ GTX0_RXDISPERR_OUT

GTX0_RXDISPERR_OUT out std_logic
Port

◆ GTX0_RXELECIDLE_OUT

GTX0_RXELECIDLE_OUT out std_logic
Port

◆ GTX0_RXENMCOMMAALIGN_IN

GTX0_RXENMCOMMAALIGN_IN in std_logic
Port

◆ GTX0_RXENPCOMMAALIGN_IN

GTX0_RXENPCOMMAALIGN_IN in std_logic
Port

◆ GTX0_RXN_IN

GTX0_RXN_IN in std_logic
Port

◆ GTX0_RXNOTINTABLE_OUT

GTX0_RXNOTINTABLE_OUT out std_logic
Port

◆ GTX0_RXP_IN

GTX0_RXP_IN in std_logic
Port

◆ GTX0_RXPLLLKDET_OUT

GTX0_RXPLLLKDET_OUT out std_logic
Port

◆ GTX0_RXPOWERDOWN_IN

GTX0_RXPOWERDOWN_IN in std_logic_vector ( 1 downto 0 )
Port

◆ GTX0_RXRECCLK_OUT

GTX0_RXRECCLK_OUT out std_logic
Port

◆ GTX0_RXRESET_IN

GTX0_RXRESET_IN in std_logic
Port

◆ GTX0_RXRESETDONE_OUT

GTX0_RXRESETDONE_OUT out std_logic
Port

◆ GTX0_RXRUNDISP_OUT

GTX0_RXRUNDISP_OUT out std_logic
Port

◆ GTX0_RXUSRCLK2_IN

GTX0_RXUSRCLK2_IN in std_logic
Port

◆ GTX0_TXBUFSTATUS_OUT

GTX0_TXBUFSTATUS_OUT out std_logic_vector ( 1 downto 0 )
Port

◆ GTX0_TXCHARDISPMODE_IN

GTX0_TXCHARDISPMODE_IN in std_logic
Port

◆ GTX0_TXCHARDISPVAL_IN

GTX0_TXCHARDISPVAL_IN in std_logic
Port

◆ GTX0_TXCHARISK_IN

GTX0_TXCHARISK_IN in std_logic
Port

◆ GTX0_TXDATA_IN

GTX0_TXDATA_IN in std_logic_vector ( 7 downto 0 )
Port

◆ GTX0_TXN_OUT

GTX0_TXN_OUT out std_logic
Port

◆ GTX0_TXOUTCLK_OUT

GTX0_TXOUTCLK_OUT out std_logic
Port

◆ GTX0_TXP_OUT

GTX0_TXP_OUT out std_logic
Port

◆ GTX0_TXPOWERDOWN_IN

GTX0_TXPOWERDOWN_IN in std_logic_vector ( 1 downto 0 )
Port

◆ GTX0_TXRESET_IN

GTX0_TXRESET_IN in std_logic
Port

◆ GTX0_TXRESETDONE_OUT

GTX0_TXRESETDONE_OUT out std_logic
Port

◆ GTX0_TXUSRCLK2_IN

GTX0_TXUSRCLK2_IN in std_logic
Port

◆ ieee

ieee
Library

◆ numeric_std

numeric_std
Package

◆ std_logic_1164

std_logic_1164
Package

◆ UNISIM

UNISIM
Library

◆ VCOMPONENTS

VCOMPONENTS
Package

◆ WRAPPER_SIM_GTXRESET_SPEEDUP

WRAPPER_SIM_GTXRESET_SPEEDUP integer := 0
Generic

The documentation for this class was generated from the following file: