rtl Architecture Reference

Processes
PROCESS_17	( rst_b , clk )

Signals
q_int	std_logic_vector ( COUNT_WIDTH - 1 downto 0 )

Member Function Documentation

PROCESS_17()

PROCESS_17 (   rst_b ,   clk   )

Process

Member Data Documentation

q_int

q_int std_logic_vector ( COUNT_WIDTH - 1 downto 0 )

Signal

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The documentation for this class was generated from the following file:

• common/Misc/hdl/counter.vhd