My Project  v0.0.16
Components | Signals | Attributes | Processes | Instantiations
rtl Architecture Reference

Processes

PROCESS_820  ( rx_clk_io )
PROCESS_821  ( clk125 )
PROCESS_822  ( rx_clk )

Components

temac_gbe_v9_0_gmii  <Entity temac_gbe_v9_0_gmii>
mac_fifo_axi4  <Entity mac_fifo_axi4>
temac_gbe_v9_0 

Signals

rx_data_e  std_logic_vector ( 7 downto 0 )
rx_clk_e  std_logic
rx_valid_e  std_logic
rx_last_e  std_logic
rx_user_e  std_logic
rx_rst_e  std_logic
rx_rst_en  std_logic
rstn  std_logic
rx_user_f  std_logic_vector ( 0 downto 0 )
rx_user_ef  std_logic_vector ( 0 downto 0 )
rx_clk  std_logic
rx_clk_io  std_logic
txd_e  std_logic_vector ( 7 downto 0 )
rxd_r  std_logic_vector ( 7 downto 0 )
tx_en_e  std_logic
tx_er_e  std_logic
rx_dv_r  std_logic
rx_er_r  std_logic
gmii_rxd_del  std_logic_vector ( 7 downto 0 )
gmii_rx_dv_del  std_logic
gmii_rx_er_del  std_logic
rx_rst  std_logic

Attributes

IODELAY_GROUP  string
IODELAY_GROUP  idelayctrl0 : label is " iodel_gmii_rx "
IODELAY_GROUP  iodelay_dv : label is " iodel_gmii_rx "
IODELAY_GROUP  iodelay_er : label is " iodel_gmii_rx "
IODELAY_GROUP  iodelay : label is " iodel_gmii_rx "

Instantiations

idelayctrl0  idelayctrl
emac0  temac_gbe_v9_0_gmii <Entity temac_gbe_v9_0_gmii>
fifo  mac_fifo_axi4 <Entity mac_fifo_axi4>
idelayctrl0  idelayctrl
bufio0  bufio
iodelay  idelaye2
iodelay_dv  idelaye2
iodelay_er  idelaye2
oddr0  oddr
emac0  temac_gbe_v9_0
fifo  mac_fifo_axi4 <Entity mac_fifo_axi4>

Member Function Documentation

◆ PROCESS_820()

PROCESS_820 (   rx_clk_io)

◆ PROCESS_821()

PROCESS_821 (   clk125  
)
Process

◆ PROCESS_822()

PROCESS_822 (   rx_clk)

Member Data Documentation

◆ bufio0

bufio0 bufio
Instantiation

◆ emac0 [1/2]

emac0 temac_gbe_v9_0_gmii
Instantiation

◆ emac0 [2/2]

emac0 temac_gbe_v9_0
Instantiation

◆ fifo [1/2]

fifo mac_fifo_axi4
Instantiation

◆ fifo [2/2]

fifo mac_fifo_axi4
Instantiation

◆ gmii_rx_dv_del

gmii_rx_dv_del std_logic
Signal

◆ gmii_rx_er_del

gmii_rx_er_del std_logic
Signal

◆ gmii_rxd_del

gmii_rxd_del std_logic_vector ( 7 downto 0 )
Signal

◆ idelayctrl0 [1/2]

idelayctrl0 idelayctrl
Instantiation

◆ idelayctrl0 [2/2]

idelayctrl0 idelayctrl
Instantiation

◆ iodelay

iodelay idelaye2
Instantiation

◆ iodelay_dv

iodelay_dv idelaye2
Instantiation

◆ iodelay_er

iodelay_er idelaye2
Instantiation

◆ IODELAY_GROUP [1/5]

IODELAY_GROUP string
Attribute

◆ IODELAY_GROUP [2/5]

IODELAY_GROUP idelayctrl0 : label is " iodel_gmii_rx "
Attribute

◆ IODELAY_GROUP [3/5]

IODELAY_GROUP iodelay_dv : label is " iodel_gmii_rx "
Attribute

◆ IODELAY_GROUP [4/5]

IODELAY_GROUP iodelay_er : label is " iodel_gmii_rx "
Attribute

◆ IODELAY_GROUP [5/5]

iodelay:label is "iodel_gmii_rx" IODELAY_GROUP

◆ mac_fifo_axi4

mac_fifo_axi4
Component

◆ oddr0

oddr0 oddr
Instantiation

◆ rstn

rstn std_logic
Signal

◆ rx_clk

rx_clk std_logic
Signal

◆ rx_clk_e

rx_clk_e std_logic
Signal

◆ rx_clk_io

rx_clk_io std_logic
Signal

◆ rx_data_e

rx_data_e std_logic_vector ( 7 downto 0 )
Signal

◆ rx_dv_r

rx_dv_r std_logic
Signal

◆ rx_er_r

rx_er_r std_logic
Signal

◆ rx_last_e

rx_last_e std_logic
Signal

◆ rx_rst

rx_rst std_logic
Signal

◆ rx_rst_e

rx_rst_e std_logic
Signal

◆ rx_rst_en

rx_rst_en std_logic
Signal

◆ rx_user_e

rx_user_e std_logic
Signal

◆ rx_user_ef

rx_user_ef std_logic_vector ( 0 downto 0 )
Signal

◆ rx_user_f

rx_user_f std_logic_vector ( 0 downto 0 )
Signal

◆ rx_valid_e

rx_valid_e std_logic
Signal

◆ rxd_r

rxd_r std_logic_vector ( 7 downto 0 )
Signal

◆ temac_gbe_v9_0

temac_gbe_v9_0
Component

◆ temac_gbe_v9_0_gmii

◆ tx_en_e

tx_en_e std_logic
Signal

◆ tx_er_e

tx_er_e std_logic
Signal

◆ txd_e

txd_e std_logic_vector ( 7 downto 0 )
Signal

The documentation for this class was generated from the following file: