rtl Architecture Reference

Processes
ttc_in	( ttc_clk , sync_frame )
synch	( data_clk , sync_frame_in , sreg )
frame_tick	( data_clk , sync_frame , frame_index )

Signals
sync_frame_in	std_logic := ' 0 '
sreg	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sync_pulse	std_logic := ' 0 '
frame_index	natural range 0 to 7 := 0

Attributes
ASYNC_REG	string
ASYNC_REG	sreg : signal is " TRUE "

Member Function Documentation

frame_tick()

frame_tick (   data_clk ,   sync_frame ,   frame_index   )

Process

synch()

synch (   data_clk ,   sync_frame_in ,   sreg   )

Process

ttc_in()

ttc_in (   ttc_clk ,   sync_frame   )

Process

Member Data Documentation

ASYNC_REG [1/2]

ASYNC_REG string

Attribute

ASYNC_REG [2/2]

ASYNC_REG sreg : signal is " TRUE "

Attribute

frame_index

frame_index natural range 0 to 7 := 0

Signal

sreg

sreg std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )

Signal

sync_frame_in

sync_frame_in std_logic := ' 0 '

Signal

sync_pulse

sync_pulse std_logic := ' 0 '

Signal

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The documentation for this class was generated from the following file:

• common/DSS_buffer/hdl/framing_sync_logic.vhd