RTL Architecture Reference

Functions
integer	get_max_wait_bypass ( manual_mode: in in boolean )
integer	get_max_wait_bypass ( manual_mode: in in boolean )

Processes
PROCESS_152	( STABLE_CLOCK )
PROCESS_153	( STABLE_CLOCK )
retries_recclk_monitor	( STABLE_CLOCK )
timeouts	( STABLE_CLOCK )
mmcm_lock_wait	( RXUSERCLK )
reclocking	( STABLE_CLOCK )
PROCESS_154	( RXUSERCLK )
PROCESS_155	( STABLE_CLOCK )
timeout_buffer_bypass	( RXUSERCLK )
reset_fsm	( STABLE_CLOCK )
PROCESS_713	( STABLE_CLOCK )
PROCESS_714	( STABLE_CLOCK )
retries_recclk_monitor	( STABLE_CLOCK )
timeouts	( STABLE_CLOCK )
mmcm_lock_wait	( RXUSERCLK )
reclocking	( STABLE_CLOCK )
PROCESS_715	( RXUSERCLK )
PROCESS_716	( STABLE_CLOCK )
timeout_buffer_bypass	( RXUSERCLK )
reset_fsm	( STABLE_CLOCK )

Constants
MMCM_LOCK_CNT_MAX	integer := 1024
STARTUP_DELAY	integer := 500
WAIT_CYCLES	integer := STARTUP_DELAY / STABLE_CLOCK_PERIOD
WAIT_MAX	integer := WAIT_CYCLES + 10
WAIT_TIMEOUT_2ms	integer := 2000000 / STABLE_CLOCK_PERIOD
WAIT_TLOCK_MAX	integer := 100000 / STABLE_CLOCK_PERIOD
WAIT_TIMEOUT_500us	integer := 500000 / STABLE_CLOCK_PERIOD
WAIT_TIMEOUT_1us	integer := 1000 / STABLE_CLOCK_PERIOD
WAIT_TIMEOUT_100us	integer := 100000 / STABLE_CLOCK_PERIOD
WAIT_TIME_ADAPT	integer := ( 37000000 / integer ( 1 . 25 ) ) / STABLE_CLOCK_PERIOD
MAX_RETRIES	integer := 2 ** RETRY_COUNTER_BITWIDTH - 1
MAX_WAIT_BYPASS	integer := get_max_wait_bypass ( PHASE_ALIGNMENT_MANUAL )

Types
rx_rst_fsm_type	( INIT , ASSERT_ALL_RESETS , RELEASE_PLL_RESET , VERIFY_RECCLK_STABLE , RELEASE_MMCM_RESET , WAIT_RESET_DONE , DO_PHASE_ALIGNMENT , MONITOR_DATA_VALID , FSM_DONE )

Signals
rx_state	rx_rst_fsm_type := INIT
init_wait_count	integer range 0 to WAIT_MAX := 0
init_wait_done	std_logic := ' 0 '
pll_reset_asserted	std_logic := ' 0 '
rx_fsm_reset_done_int	std_logic := ' 0 '
rx_fsm_reset_done_int_s1	std_logic := ' 0 '
rx_fsm_reset_done_int_s2	std_logic := ' 0 '
rx_fsm_reset_done_int_s3	std_logic := ' 0 '
rxresetdone_s1	std_logic := ' 0 '
rxresetdone_s2	std_logic := ' 0 '
rxresetdone_s3	std_logic := ' 0 '
retry_counter_int	integer range 0 to MAX_RETRIES := 0
time_out_counter	integer range 0 to WAIT_TIMEOUT_2ms := 0
recclk_mon_restart_count	integer range 0 to 3 := 0
recclk_mon_count_reset	std_logic := ' 0 '
reset_time_out	std_logic := ' 0 '
time_out_2ms	std_logic := ' 0 '
time_tlock_max	std_logic := ' 0 '
time_out_500us	std_logic := ' 0 '
time_out_1us	std_logic := ' 0 '
time_out_100us	std_logic := ' 0 '
check_tlock_max	std_logic := ' 0 '
mmcm_lock_count	integer range 0 to MMCM_LOCK_CNT_MAX - 1 := 0
mmcm_lock_int	std_logic := ' 0 '
mmcm_lock_reclocked	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
run_phase_alignment_int	std_logic := ' 0 '
run_phase_alignment_int_s1	std_logic := ' 0 '
run_phase_alignment_int_s2	std_logic := ' 0 '
run_phase_alignment_int_s3	std_logic := ' 0 '
wait_bypass_count	integer range 0 to MAX_WAIT_BYPASS - 1
time_out_wait_bypass	std_logic := ' 0 '
time_out_wait_bypass_s1	std_logic := ' 0 '
time_out_wait_bypass_s2	std_logic := ' 0 '
time_out_wait_bypass_s3	std_logic := ' 0 '
refclk_lost	std_logic
time_out_adapt	std_logic := ' 0 '
adapt_count_reset	std_logic := ' 0 '
adapt_count	integer range 0 to WAIT_TIME_ADAPT - 1

Member Function Documentation

get_max_wait_bypass() [1/2]

integer get_max_wait_bypass (   manual_mode in in boolean   )

Function

get_max_wait_bypass() [2/2]

integer get_max_wait_bypass (   manual_mode in in boolean   )

Function

mmcm_lock_wait() [1/2]

mmcm_lock_wait (   RXUSERCLK   )

Process

mmcm_lock_wait() [2/2]

mmcm_lock_wait (   RXUSERCLK   )

Process

PROCESS_152()

PROCESS_152 (   STABLE_CLOCK   )

Process

PROCESS_153()

PROCESS_153 (   STABLE_CLOCK   )

Process

PROCESS_154()

PROCESS_154 (   RXUSERCLK   )

Process

PROCESS_155()

PROCESS_155 (   STABLE_CLOCK   )

Process

PROCESS_713()

PROCESS_713 (   STABLE_CLOCK   )

Process

PROCESS_714()

PROCESS_714 (   STABLE_CLOCK   )

Process

PROCESS_715()

PROCESS_715 (   RXUSERCLK   )

Process

PROCESS_716()

PROCESS_716 (   STABLE_CLOCK   )

Process

reclocking() [1/2]

reclocking (   STABLE_CLOCK   )

Process

reclocking() [2/2]

reclocking (   STABLE_CLOCK   )

Process

reset_fsm() [1/2]

reset_fsm (   STABLE_CLOCK   )

Process

reset_fsm() [2/2]

reset_fsm (   STABLE_CLOCK   )

Process

retries_recclk_monitor() [1/2]

retries_recclk_monitor (   STABLE_CLOCK   )

Process

retries_recclk_monitor() [2/2]

retries_recclk_monitor (   STABLE_CLOCK   )

Process

timeout_buffer_bypass() [1/2]

timeout_buffer_bypass (   RXUSERCLK   )

Process

timeout_buffer_bypass() [2/2]

timeout_buffer_bypass (   RXUSERCLK   )

Process

timeouts() [1/2]

timeouts (   STABLE_CLOCK   )

Process

timeouts() [2/2]

timeouts (   STABLE_CLOCK   )

Process

Member Data Documentation

adapt_count

adapt_count integer range 0 to WAIT_TIME_ADAPT - 1

Signal

adapt_count_reset

adapt_count_reset std_logic := ' 0 '

Signal

check_tlock_max

check_tlock_max std_logic := ' 0 '

Signal

init_wait_count

init_wait_count integer range 0 to WAIT_MAX := 0

Signal

init_wait_done

init_wait_done std_logic := ' 0 '

Signal

MAX_RETRIES

MAX_RETRIES integer := 2 ** RETRY_COUNTER_BITWIDTH - 1

Constant

MAX_WAIT_BYPASS

MAX_WAIT_BYPASS integer := get_max_wait_bypass ( PHASE_ALIGNMENT_MANUAL )

Constant

MMCM_LOCK_CNT_MAX

MMCM_LOCK_CNT_MAX integer := 1024

Constant

mmcm_lock_count

mmcm_lock_count integer range 0 to MMCM_LOCK_CNT_MAX - 1 := 0

Signal

mmcm_lock_int

mmcm_lock_int std_logic := ' 0 '

Signal

mmcm_lock_reclocked

mmcm_lock_reclocked std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )

Signal

pll_reset_asserted

pll_reset_asserted std_logic := ' 0 '

Signal

recclk_mon_count_reset

recclk_mon_count_reset std_logic := ' 0 '

Signal

recclk_mon_restart_count

recclk_mon_restart_count integer range 0 to 3 := 0

Signal

refclk_lost

refclk_lost std_logic

Signal

reset_time_out

reset_time_out std_logic := ' 0 '

Signal

retry_counter_int

retry_counter_int integer range 0 to MAX_RETRIES := 0

Signal

run_phase_alignment_int

run_phase_alignment_int std_logic := ' 0 '

Signal

run_phase_alignment_int_s1

run_phase_alignment_int_s1 std_logic := ' 0 '

Signal

run_phase_alignment_int_s2

run_phase_alignment_int_s2 std_logic := ' 0 '

Signal

run_phase_alignment_int_s3

run_phase_alignment_int_s3 std_logic := ' 0 '

Signal

rx_fsm_reset_done_int

rx_fsm_reset_done_int std_logic := ' 0 '

Signal

rx_fsm_reset_done_int_s1

rx_fsm_reset_done_int_s1 std_logic := ' 0 '

Signal

rx_fsm_reset_done_int_s2

rx_fsm_reset_done_int_s2 std_logic := ' 0 '

Signal

rx_fsm_reset_done_int_s3

rx_fsm_reset_done_int_s3 std_logic := ' 0 '

Signal

rx_rst_fsm_type

rx_rst_fsm_type ( INIT , ASSERT_ALL_RESETS , RELEASE_PLL_RESET , VERIFY_RECCLK_STABLE , RELEASE_MMCM_RESET , WAIT_RESET_DONE , DO_PHASE_ALIGNMENT , MONITOR_DATA_VALID , FSM_DONE )

Type

rx_state

rx_state rx_rst_fsm_type := INIT

Signal

rxresetdone_s1

rxresetdone_s1 std_logic := ' 0 '

Signal

rxresetdone_s2

rxresetdone_s2 std_logic := ' 0 '

Signal

rxresetdone_s3

rxresetdone_s3 std_logic := ' 0 '

Signal

STARTUP_DELAY

STARTUP_DELAY integer := 500

Constant

time_out_100us

time_out_100us std_logic := ' 0 '

Signal

time_out_1us

time_out_1us std_logic := ' 0 '

Signal

time_out_2ms

time_out_2ms std_logic := ' 0 '

Signal

time_out_500us

time_out_500us std_logic := ' 0 '

Signal

time_out_adapt

time_out_adapt std_logic := ' 0 '

Signal

time_out_counter

time_out_counter integer range 0 to WAIT_TIMEOUT_2ms := 0

Signal

time_out_wait_bypass

time_out_wait_bypass std_logic := ' 0 '

Signal

time_out_wait_bypass_s1

time_out_wait_bypass_s1 std_logic := ' 0 '

Signal

time_out_wait_bypass_s2

time_out_wait_bypass_s2 std_logic := ' 0 '

Signal

time_out_wait_bypass_s3

time_out_wait_bypass_s3 std_logic := ' 0 '

Signal

time_tlock_max

time_tlock_max std_logic := ' 0 '

Signal

wait_bypass_count

wait_bypass_count integer range 0 to MAX_WAIT_BYPASS - 1

Signal

WAIT_CYCLES

WAIT_CYCLES integer := STARTUP_DELAY / STABLE_CLOCK_PERIOD

Constant

WAIT_MAX

WAIT_MAX integer := WAIT_CYCLES + 10

Constant

WAIT_TIME_ADAPT

WAIT_TIME_ADAPT integer := ( 37000000 / integer ( 1 . 25 ) ) / STABLE_CLOCK_PERIOD

Constant

WAIT_TIMEOUT_100us

WAIT_TIMEOUT_100us integer := 100000 / STABLE_CLOCK_PERIOD

Constant

WAIT_TIMEOUT_1us

WAIT_TIMEOUT_1us integer := 1000 / STABLE_CLOCK_PERIOD

Constant

WAIT_TIMEOUT_2ms

WAIT_TIMEOUT_2ms integer := 2000000 / STABLE_CLOCK_PERIOD

Constant

WAIT_TIMEOUT_500us

WAIT_TIMEOUT_500us integer := 500000 / STABLE_CLOCK_PERIOD

Constant

WAIT_TLOCK_MAX

WAIT_TLOCK_MAX integer := 100000 / STABLE_CLOCK_PERIOD

Constant

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The documentation for this class was generated from the following file:

• components/ipbus_eth/firmware/gen_hdl/gtwizard_v2_3_gbe/gtwizard_v2_3_gbe_rx_startup_fsm.vhd