My Project
v0.0.16
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Processes | |
PROCESS_22 | ( ipbus_clk ) |
PROCESS_23 | ( mgt_clk ) |
PROCESS_24 | ( mgt_clk ) |
PROCESS_25 | ( ipbus_clk ) |
PROCESS_26 | ( mgt_clk ) |
Constants | |
SEL_BITS | integer := integer ( ceil ( log2 ( real ( NUMREG ) ) ) ) |
MAXCOUNT | unsigned ( 31 downto 0 ) := ( others = > ' 1 ' ) |
MAXCOUNT | unsigned ( 31 downto 0 ) := x " 0000000f " |
Types | |
counter_array | ( 0 to NUMREG - 1 ) unsigned ( 31 downto 0 ) |
Signals | |
counters | counter_array := ( others = > ( others = > ' 0 ' ) ) |
sel | integer range 0 to NUMREG - 1 |
addr | std_logic_vector ( SEL_BITS - 1 downto 0 ) |
ack | std_logic := ' 0 ' |
clear | std_logic := ' 0 ' |
pre_clear | std_logic := ' 0 ' |
ipb_clear | std_logic := ' 0 ' |
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Process |
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Process |
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Process |
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Process |
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Process |
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Signal |
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Signal |
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Type |
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Signal |
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Signal |
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Constant |
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Constant |
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Signal |