My Project  v0.0.16
Constants
rtl Architecture Reference

Constants

MType  std_logic_vector ( 15 downto 0 ) := X " FACE "
HWver  std_logic_vector ( 3 downto 0 ) := X " 1 "
HWrev  std_logic_vector ( 3 downto 0 ) := X " 1 "
PCBsn  std_logic_vector ( 7 downto 0 ) := X " 00 "
FW_Version  integer := 0
PCBver  std_logic_vector ( 3 downto 0 ) := X " 1 "
FW_Version  integer := 18
HWrev  std_logic_vector ( 7 downto 0 ) := X " 00 "
Version  integer := 17

Member Data Documentation

◆ FW_Version [1/2]

FW_Version integer := 0
Constant

◆ FW_Version [2/2]

FW_Version integer := 18
Constant

◆ HWrev [1/2]

HWrev std_logic_vector ( 7 downto 0 ) := X " 00 "
Constant

◆ HWrev [2/2]

HWrev std_logic_vector ( 3 downto 0 ) := X " 1 "
Constant

◆ HWver

HWver std_logic_vector ( 3 downto 0 ) := X " 1 "
Constant

◆ MType

MType std_logic_vector ( 15 downto 0 ) := X " FACE "
Constant

◆ PCBsn

PCBsn std_logic_vector ( 7 downto 0 ) := X " 00 "
Constant

◆ PCBver

PCBver std_logic_vector ( 3 downto 0 ) := X " 1 "
Constant

◆ Version

Version integer := 17
Constant

The documentation for this class was generated from the following files: