My Project  v0.0.16
Signals | Instantiations
rtl Architecture Reference

Signals

trig_pulse  std_logic := ' 0 '
control_reg  ipb_reg_v ( 1 downto 0 )
null_status  ipb_reg_v ( 0 downto 0 ) := ( others = > ( others = > ' 0 ' ) )
wbstart  std_logic_vector ( 31 downto 0 )

Instantiations

wbstart_reg  ipbus_ctrlreg_v <Entity ipbus_ctrlreg_v>
config  reconfigure_fsm <Entity reconfigure_fsm>

Member Data Documentation

◆ config

config reconfigure_fsm
Instantiation

◆ control_reg

control_reg ipb_reg_v ( 1 downto 0 )
Signal

◆ null_status

null_status ipb_reg_v ( 0 downto 0 ) := ( others = > ( others = > ' 0 ' ) )
Signal

◆ trig_pulse

trig_pulse std_logic := ' 0 '
Signal

◆ wbstart

wbstart std_logic_vector ( 31 downto 0 )
Signal

◆ wbstart_reg

wbstart_reg ipbus_ctrlreg_v
Instantiation

The documentation for this class was generated from the following file: