My Project  v0.0.16
Signals | Processes
struct Architecture Reference

Processes

PROCESS_402  ( ipb_clk , addr , ipb_in .ipb_wdata , ipb_in .ipb_strobe , ipb_in .ipb_write , ack )
PROCESS_403  ( ipb_clk , crc_error_count )
stretch_ecr  ( ipb_clk , ecr_pulse , ecr_pulse_d )
stretch_ecrid_rst  ( ipb_clk , ecr_pulse , ecr_pulse_d )

Signals

ack  std_logic := ' 0 '
addr  natural range 0 to 7
write_pulse1  std_logic := ' 0 '
clear_counter  std_logic := ' 0 '
crc_error_count_int  std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
ttc_tune_reg  std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
ttc_packet_delay  std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' )
ecr_pulse  std_logic := ' 0 '
ecr_pulse_d  std_logic := ' 0 '
ecrid_rst  std_logic := ' 0 '
ecrid_rst_d  std_logic := ' 0 '

Member Function Documentation

◆ PROCESS_402()

PROCESS_402 (   ipb_clk ,
  addr ,
  ipb_in .ipb_wdata ,
  ipb_in .ipb_strobe ,
  ipb_in .ipb_write ,
  ack  
)
Process

◆ PROCESS_403()

PROCESS_403 (   ipb_clk ,
  crc_error_count  
)
Process

◆ stretch_ecr()

stretch_ecr (   ipb_clk ,
  ecr_pulse ,
  ecr_pulse_d  
)
Process

◆ stretch_ecrid_rst()

stretch_ecrid_rst (   ipb_clk ,
  ecr_pulse ,
  ecr_pulse_d  
)
Process

Member Data Documentation

◆ ack

ack std_logic := ' 0 '
Signal

◆ addr

addr natural range 0 to 7
Signal

◆ clear_counter

clear_counter std_logic := ' 0 '
Signal

◆ crc_error_count_int

crc_error_count_int std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
Signal

◆ ecr_pulse

ecr_pulse std_logic := ' 0 '
Signal

◆ ecr_pulse_d

ecr_pulse_d std_logic := ' 0 '
Signal

◆ ecrid_rst

ecrid_rst std_logic := ' 0 '
Signal

◆ ecrid_rst_d

ecrid_rst_d std_logic := ' 0 '
Signal

◆ ttc_packet_delay

ttc_packet_delay std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' )
Signal

◆ ttc_tune_reg

ttc_tune_reg std_logic_vector ( 4 downto 0 ) := ( others = > ' 0 ' )
Signal

◆ write_pulse1

write_pulse1 std_logic := ' 0 '
Signal

The documentation for this class was generated from the following file: