My Project  v0.0.16
Signals | Processes | Instantiations
rtl Architecture Reference

Processes

retime  ( ipb_clk )
retime_resets  ( drp_clk , xcvr_ctrl_reg )

Signals

rxon  std_logic := ' 0 '
xcvr_status  ipb_reg_v ( 3 downto 0 )
xcvr_ctrl_reg  ipb_reg_v ( 1 downto 0 )

Instantiations

xcvr_control  ipbus_ctrlreg_v <Entity ipbus_ctrlreg_v>

Member Function Documentation

◆ retime()

retime (   ipb_clk)

◆ retime_resets()

retime_resets (   drp_clk ,
  xcvr_ctrl_reg  
)
Process

Member Data Documentation

◆ rxon

rxon std_logic := ' 0 '
Signal

◆ xcvr_control

xcvr_control ipbus_ctrlreg_v
Instantiation

◆ xcvr_ctrl_reg

xcvr_ctrl_reg ipb_reg_v ( 1 downto 0 )
Signal

◆ xcvr_status

xcvr_status ipb_reg_v ( 3 downto 0 )
Signal

The documentation for this class was generated from the following file: