My Project
v0.0.16
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Processes | |
retime | ( ipb_clk ) |
retime_resets | ( drp_clk , xcvr_ctrl_reg ) |
Signals | |
rxon | std_logic := ' 0 ' |
xcvr_status | ipb_reg_v ( 3 downto 0 ) |
xcvr_ctrl_reg | ipb_reg_v ( 1 downto 0 ) |
Instantiations | |
xcvr_control | ipbus_ctrlreg_v <Entity ipbus_ctrlreg_v> |
retime | ( | ipb_clk | ) |
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Process |
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Signal |
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Instantiation |
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Signal |
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Signal |