mac_fifo_axi4_xpm_cdc_async_rst Entity Reference

Entities
STRUCTURE	architecture

Libraries
IEEE
UNISIM

Use Clauses
STD_LOGIC_1164
VCOMPONENTS

Ports
src_arst	in STD_LOGIC
dest_clk	in STD_LOGIC
dest_arst	out STD_LOGIC

Attributes
DEF_VAL	string
DEF_VAL	mac_fifo_axi4_xpm_cdc_async_rst : entity is " 1 ' b0 "
DEST_SYNC_FF	integer
DEST_SYNC_FF	mac_fifo_axi4_xpm_cdc_async_rst : entity is 2
INIT_SYNC_FF	integer
INIT_SYNC_FF	mac_fifo_axi4_xpm_cdc_async_rst : entity is 0
INV_DEF_VAL	string
INV_DEF_VAL	mac_fifo_axi4_xpm_cdc_async_rst : entity is " 1 ' b1 "
ORIG_REF_NAME	string
ORIG_REF_NAME	mac_fifo_axi4_xpm_cdc_async_rst : entity is " xpm_cdc_async_rst "
RST_ACTIVE_HIGH	integer
RST_ACTIVE_HIGH	mac_fifo_axi4_xpm_cdc_async_rst : entity is 1
VERSION	integer
VERSION	mac_fifo_axi4_xpm_cdc_async_rst : entity is 0
XPM_MODULE	string
XPM_MODULE	mac_fifo_axi4_xpm_cdc_async_rst : entity is " TRUE "
xpm_cdc	string
xpm_cdc	mac_fifo_axi4_xpm_cdc_async_rst : entity is " ASYNC_RST "

Member Data Documentation

DEF_VAL [1/2]

DEF_VAL string

Attribute

DEF_VAL [2/2]

DEF_VAL mac_fifo_axi4_xpm_cdc_async_rst : entity is " 1 ' b0 "

Attribute

dest_arst

dest_arst out STD_LOGIC

Port

dest_clk

dest_clk in STD_LOGIC

Port

DEST_SYNC_FF [1/2]

DEST_SYNC_FF integer

Attribute

DEST_SYNC_FF [2/2]

DEST_SYNC_FF mac_fifo_axi4_xpm_cdc_async_rst : entity is 2

Attribute

IEEE

IEEE

Library

INIT_SYNC_FF [1/2]

INIT_SYNC_FF integer

Attribute

INIT_SYNC_FF [2/2]

INIT_SYNC_FF mac_fifo_axi4_xpm_cdc_async_rst : entity is 0

Attribute

INV_DEF_VAL [1/2]

INV_DEF_VAL string

Attribute

INV_DEF_VAL [2/2]

INV_DEF_VAL mac_fifo_axi4_xpm_cdc_async_rst : entity is " 1 ' b1 "

Attribute

ORIG_REF_NAME [1/2]

ORIG_REF_NAME string

Attribute

ORIG_REF_NAME [2/2]

ORIG_REF_NAME mac_fifo_axi4_xpm_cdc_async_rst : entity is " xpm_cdc_async_rst "

Attribute

RST_ACTIVE_HIGH [1/2]

RST_ACTIVE_HIGH integer

Attribute

RST_ACTIVE_HIGH [2/2]

RST_ACTIVE_HIGH mac_fifo_axi4_xpm_cdc_async_rst : entity is 1

Attribute

src_arst

src_arst in STD_LOGIC

Port

STD_LOGIC_1164

STD_LOGIC_1164

Package

UNISIM

UNISIM

Library

VCOMPONENTS

VCOMPONENTS

Package

VERSION [1/2]

VERSION integer

Attribute

VERSION [2/2]

VERSION mac_fifo_axi4_xpm_cdc_async_rst : entity is 0

Attribute

xpm_cdc [1/2]

xpm_cdc string

Attribute

xpm_cdc [2/2]

xpm_cdc mac_fifo_axi4_xpm_cdc_async_rst : entity is " ASYNC_RST "

Attribute

XPM_MODULE [1/2]

XPM_MODULE string

Attribute

XPM_MODULE [2/2]

XPM_MODULE mac_fifo_axi4_xpm_cdc_async_rst : entity is " TRUE "

Attribute

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The documentation for this class was generated from the following file:

• IP/mac_fifo_axi4/mac_fifo_axi4_sim_netlist.vhdl