My Project  v0.0.16
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mp7_ctrl Entity Reference
Inheritance diagram for mp7_ctrl:
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Collaboration diagram for mp7_ctrl:
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Entities

rtl  architecture
 

Libraries

IEEE 

Use Clauses

STD_LOGIC_1164 
ipbus  Package <ipbus>
ipbus_trans_decl  Package <ipbus_trans_decl>
ipbus_reg_types  Package <ipbus_reg_types>
ipbus_decode_mp7_ctrl 
top_decl  Package <top_decl>

Generics

FW_REV  std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )

Ports

clk   in std_logic
rst   in std_logic
ipb_in   in ipb_wbus
ipb_out   out ipb_rbus
nuke   out std_logic
soft_rst   out std_logic
qsel   out std_logic_vector ( 7 downto 0 )
ppsel   out std_logic_vector ( 5 downto 0 )
pp_data_sel   out std_logic
board_loc   out std_logic_vector ( 31 downto 0 )
debug   in std_logic_vector ( 7 downto 0 ) := X " 00 "
clk40_rst   out std_logic
clk40_sel   out std_logic
clk40_lock   in std_logic
clk40_stop   in std_logic

Member Data Documentation

◆ board_loc

board_loc out std_logic_vector ( 31 downto 0 )
Port

◆ clk

clk in std_logic
Port

◆ clk40_lock

clk40_lock in std_logic
Port

◆ clk40_rst

clk40_rst out std_logic
Port

◆ clk40_sel

clk40_sel out std_logic
Port

◆ clk40_stop

clk40_stop in std_logic
Port

◆ debug

debug in std_logic_vector ( 7 downto 0 ) := X " 00 "
Port

◆ FW_REV

FW_REV std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
Generic

◆ IEEE

IEEE
Library

◆ ipb_in

ipb_in in ipb_wbus
Port

◆ ipb_out

ipb_out out ipb_rbus
Port

◆ ipbus

ipbus
Package

◆ ipbus_decode_mp7_ctrl

◆ ipbus_reg_types

ipbus_reg_types
Package

◆ ipbus_trans_decl

◆ nuke

nuke out std_logic
Port

◆ pp_data_sel

pp_data_sel out std_logic
Port

◆ ppsel

ppsel out std_logic_vector ( 5 downto 0 )
Port

◆ qsel

qsel out std_logic_vector ( 7 downto 0 )
Port

◆ rst

rst in std_logic
Port

◆ soft_rst

soft_rst out std_logic
Port

◆ STD_LOGIC_1164

STD_LOGIC_1164
Package

◆ top_decl

top_decl
Package

The documentation for this class was generated from the following file: