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My Project
v0.0.16
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Processes | |
| p_hammingbits8 | ( d_br , hmg_br ) |
| p_hammingbits32 | ( d_adr , hmg_adr ) |
| p_driver | ( clk ) |
| p_synch | ( clk ) |
| p_driver | ( clk ) |
| p_synch | ( clk ) |
Types | |
| state | ( s_idle , s_fmt , s_get_data , s_get_broadcast , s_stop , s_error ) |
Signals | |
| received_word | std_logic_vector ( 38 downto 0 ) |
| brc_rdy | std_logic |
| dta_rdy | std_logic |
| serBchanR | std_logic |
| serBchanRR | std_logic |
| test_init | std_logic |
| test_data | std_logic_vector ( 41 downto 0 ) |
| d_adr | std_logic_vector ( 31 downto 0 ) |
| d_br | std_logic_vector ( 7 downto 0 ) |
| hmg_br | std_logic_vector ( 4 downto 0 ) |
| hmg_adr | std_logic_vector ( 6 downto 0 ) |
| s_br | std_logic_vector ( 4 downto 0 ) |
| s_adr | std_logic_vector ( 6 downto 0 ) |
| next_state | state |
| single_bit_error_i | std_logic |
| double_bit_error_i | std_logic |
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1.8.13