My Project  v0.0.16
Generics | Ports | Libraries | Use Clauses
stimulus_tb Entity Reference
Inheritance diagram for stimulus_tb:
Inheritance graph
[legend]

Entities

behav  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 

Generics

INSTANCE_NUMBER  integer := 0

Ports

txp   in std_logic
txn   in std_logic
rxp   out std_logic
rxn   out std_logic
gmii_tx_clk   out std_logic
gmii_rx_clk   in std_logic
gmii_txd   out std_logic_vector ( 7 downto 0 )
gmii_tx_en   out std_logic
gmii_tx_er   out std_logic
gmii_rxd   in std_logic_vector ( 7 downto 0 )
gmii_rx_dv   in std_logic
gmii_rx_er   in std_logic
configuration_finished   in boolean
tx_monitor_finished   out boolean
rx_monitor_finished   out boolean

Member Data Documentation

◆ configuration_finished

configuration_finished in boolean
Port

◆ gmii_rx_clk

gmii_rx_clk in std_logic
Port

◆ gmii_rx_dv

gmii_rx_dv in std_logic
Port

◆ gmii_rx_er

gmii_rx_er in std_logic
Port

◆ gmii_rxd

gmii_rxd in std_logic_vector ( 7 downto 0 )
Port

◆ gmii_tx_clk

gmii_tx_clk out std_logic
Port

◆ gmii_tx_en

gmii_tx_en out std_logic
Port

◆ gmii_tx_er

gmii_tx_er out std_logic
Port

◆ gmii_txd

gmii_txd out std_logic_vector ( 7 downto 0 )
Port

◆ ieee

ieee
Library

◆ INSTANCE_NUMBER

INSTANCE_NUMBER integer := 0
Generic

◆ numeric_std

numeric_std
Package

◆ rx_monitor_finished

rx_monitor_finished out boolean
Port

◆ rxn

rxn out std_logic
Port

◆ rxp

rxp out std_logic
Port

◆ std_logic_1164

std_logic_1164
Package

◆ tx_monitor_finished

tx_monitor_finished out boolean
Port

◆ txn

txn in std_logic
Port

◆ txp

txp in std_logic
Port

The documentation for this class was generated from the following file: