rtl Architecture Reference

Processes
synch	( data_clk , run_frames )
mgt_tick	( data_clk , index )

Signals
index	unsigned ( DPRAM_ADDR_WIDTH - 1 downto 0 ) := ( others = > ' 0 ' )
run	std_logic := ' 0 '

Member Function Documentation

mgt_tick()

mgt_tick (   data_clk ,   index   )

Process

synch()

synch (   data_clk ,   run_frames   )

Process

Member Data Documentation

index

index unsigned ( DPRAM_ADDR_WIDTH - 1 downto 0 ) := ( others = > ' 0 ' )

Signal

run

run std_logic := ' 0 '

Signal

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The documentation for this class was generated from the following file:

• common/DSS_buffer/hdl/tx_ram_pointer.vhd