My Project  v0.0.16
Generics | Ports | Libraries | Use Clauses
udp_buffer_selector Entity Reference
Inheritance diagram for udp_buffer_selector:
Inheritance graph
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Entities

simple  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
numeric_std 

Generics

BUFWIDTH  natural := 0

Ports

mac_clk   in std_logic
rst_macclk_reg   in std_logic
written   in std_logic
we   in std_logic
sent   in std_logic
req_resend   in std_logic
resend_buf   in std_logic_vector ( BUFWIDTH - 1 downto 0 )
busy   out std_logic
write_buf   out std_logic_vector ( BUFWIDTH - 1 downto 0 )
req_send   out std_logic
send_buf   out std_logic_vector ( BUFWIDTH - 1 downto 0 )
clean_buf   out std_logic_vector ( 2 ** BUFWIDTH - 1 downto 0 )

Member Data Documentation

◆ BUFWIDTH

BUFWIDTH natural := 0
Generic

◆ busy

busy out std_logic
Port

◆ clean_buf

clean_buf out std_logic_vector ( 2 ** BUFWIDTH - 1 downto 0 )
Port

◆ ieee

ieee
Library

◆ mac_clk

mac_clk in std_logic
Port

◆ numeric_std

numeric_std
Package

◆ req_resend

req_resend in std_logic
Port

◆ req_send

req_send out std_logic
Port

◆ resend_buf

resend_buf in std_logic_vector ( BUFWIDTH - 1 downto 0 )
Port

◆ rst_macclk_reg

rst_macclk_reg in std_logic
Port

◆ send_buf

send_buf out std_logic_vector ( BUFWIDTH - 1 downto 0 )
Port

◆ sent

sent in std_logic
Port

◆ std_logic_1164

std_logic_1164
Package

◆ we

we in std_logic
Port

◆ write_buf

write_buf out std_logic_vector ( BUFWIDTH - 1 downto 0 )
Port

◆ written

written in std_logic
Port

The documentation for this class was generated from the following file: