kc705_extphy.ucf File Reference

Constraints
sysclk_p	LOC = AD12 | IOSTANDARD = LVDS | TNM_NET = sysclk
sysclk_n	LOC = AD11 | IOSTANDARD = LVDS
TS_sysclk	PERIOD sysclk 200MHz
ipb_clk	TNM_NET = tnm_ipb_clk
clk125	TNM_NET = tnm_clk125
TS_tig_ipb_125	FROM tnm_ipb_clk TO tnm_clk125 TIG
TS_tig_125_ipb	FROM tnm_clk125 TO tnm_ipb_clk TIG
"clocks/rst"	TIG
clocks/nuke_i	TIG
leds<0>	LOC = AB8 | IOSTANDARD = LVCMOS15
leds<1>	LOC = AA8 | IOSTANDARD = LVCMOS15
leds<2>	LOC = AC9 | IOSTANDARD = LVCMOS15
leds<3>	LOC = AB9 | IOSTANDARD = LVCMOS15
TG_gmii_tx	PADS ( " gmii_tx* " )
TG_gmii_tx	FSET = OUT AFTER sysclk_p REFERENCE_PIN " gmii_gtx_clk " RISING
gmii_gtx_clk	LOC = K30 | IOSTANDARD = LVCMOS25 | SLEW = FAST
gmii_txd<0>	LOC = N27 | IOSTANDARD = LVCMOS25
gmii_txd<1>	LOC = N25 | IOSTANDARD = LVCMOS25
gmii_txd<2>	LOC = M29 | IOSTANDARD = LVCMOS25
gmii_txd<3>	LOC = L28 | IOSTANDARD = LVCMOS25
gmii_txd<4>	LOC = J26 | IOSTANDARD = LVCMOS25
gmii_txd<5>	LOC = K26 | IOSTANDARD = LVCMOS25
gmii_txd<6>	LOC = L30 | IOSTANDARD = LVCMOS25
gmii_txd<7>	LOC = J28 | IOSTANDARD = LVCMOS25
gmii_tx_en	LOC = M27 | IOSTANDARD = LVCMOS25
gmii_tx_er	LOC = N29 | IOSTANDARD = LVCMOS25
gmii_rx_clk	LOC = U27 | IOSTANDARD = LVCMOS25 | TNM_NET = " gmii_rx_clk "
"TS_GMII_RX_CLK"	PERIOD " gmii_rx_clk " 125MHz
OFFSET	IN 2 .5ns VALID 3ns BEFORE gmii_rx_clk
gmii_rxd<0>	LOC = U30 | IOSTANDARD = LVCMOS25
gmii_rxd<1>	LOC = U25 | IOSTANDARD = LVCMOS25
gmii_rxd<2>	LOC = T25 | IOSTANDARD = LVCMOS25
gmii_rxd<3>	LOC = U28 | IOSTANDARD = LVCMOS25
gmii_rxd<4>	LOC = R19 | IOSTANDARD = LVCMOS25
gmii_rxd<5>	LOC = T27 | IOSTANDARD = LVCMOS25
gmii_rxd<6>	LOC = T26 | IOSTANDARD = LVCMOS25
gmii_rxd<7>	LOC = T28 | IOSTANDARD = LVCMOS25
gmii_rx_dv	LOC = R28 | IOSTANDARD = LVCMOS25
gmii_rx_er	LOC = V26 | IOSTANDARD = LVCMOS25
eth/*iodelay*	IDELAY_VALUE = 27
phy_rstb	LOC = L20 | IOSTANDARD = LVCMOS25

Variable Documentation

"clocks/rst"

"clocks/rst" TIG

Constraints

"TS_GMII_RX_CLK"

"TS_GMII_RX_CLK" PERIOD " gmii_rx_clk " 125MHz

Constraints

clk125

clk125 TNM_NET = tnm_clk125

Constraints

clocks/nuke_i

clocks/nuke_i TIG

Constraints

eth/*iodelay*

eth/*iodelay* IDELAY_VALUE = 27

Constraints

gmii_gtx_clk

gmii_gtx_clk LOC = K30 | IOSTANDARD = LVCMOS25 | SLEW = FAST

Constraints

gmii_rx_clk

gmii_rx_clk LOC = U27 | IOSTANDARD = LVCMOS25 | TNM_NET = " gmii_rx_clk "

Constraints

gmii_rx_dv

gmii_rx_dv LOC = R28 | IOSTANDARD = LVCMOS25

Constraints

gmii_rx_er

gmii_rx_er LOC = V26 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<0>

gmii_rxd<0> LOC = U30 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<1>

gmii_rxd<1> LOC = U25 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<2>

gmii_rxd<2> LOC = T25 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<3>

gmii_rxd<3> LOC = U28 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<4>

gmii_rxd<4> LOC = R19 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<5>

gmii_rxd<5> LOC = T27 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<6>

gmii_rxd<6> LOC = T26 | IOSTANDARD = LVCMOS25

Constraints

gmii_rxd<7>

gmii_rxd<7> LOC = T28 | IOSTANDARD = LVCMOS25

Constraints

gmii_tx_en

gmii_tx_en LOC = M27 | IOSTANDARD = LVCMOS25

Constraints

gmii_tx_er

gmii_tx_er LOC = N29 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<0>

gmii_txd<0> LOC = N27 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<1>

gmii_txd<1> LOC = N25 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<2>

gmii_txd<2> LOC = M29 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<3>

gmii_txd<3> LOC = L28 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<4>

gmii_txd<4> LOC = J26 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<5>

gmii_txd<5> LOC = K26 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<6>

gmii_txd<6> LOC = L30 | IOSTANDARD = LVCMOS25

Constraints

gmii_txd<7>

gmii_txd<7> LOC = J28 | IOSTANDARD = LVCMOS25

Constraints

ipb_clk

ipb_clk TNM_NET = tnm_ipb_clk

Constraints

leds<0>

leds<0> LOC = AB8 | IOSTANDARD = LVCMOS15

Constraints

leds<1>

leds<1> LOC = AA8 | IOSTANDARD = LVCMOS15

Constraints

leds<2>

leds<2> LOC = AC9 | IOSTANDARD = LVCMOS15

Constraints

leds<3>

leds<3> LOC = AB9 | IOSTANDARD = LVCMOS15

Constraints

OFFSET

OFFSET IN 2 .5ns VALID 3ns BEFORE gmii_rx_clk

Constraints

phy_rstb

phy_rstb LOC = L20 | IOSTANDARD = LVCMOS25

Constraints

sysclk_n

sysclk_n LOC = AD11 | IOSTANDARD = LVDS

Constraints

sysclk_p

sysclk_p LOC = AD12 | IOSTANDARD = LVDS | TNM_NET = sysclk

Constraints

TG_gmii_tx [1/2]

TG_gmii_tx PADS ( " gmii_tx* " )

Constraints

TG_gmii_tx [2/2]

TG_gmii_tx FSET = OUT AFTER sysclk_p REFERENCE_PIN " gmii_gtx_clk " RISING

Constraints

TS_sysclk

TS_sysclk PERIOD sysclk 200MHz

Constraints

TS_tig_125_ipb

TS_tig_125_ipb FROM tnm_clk125 TO tnm_ipb_clk TIG

Constraints

TS_tig_ipb_125

TS_tig_ipb_125 FROM tnm_ipb_clk TO tnm_clk125 TIG

Constraints