Constraints
sysclk_p	LOC = K15 \| IOSTANDARD = LVDS_25 \| DIFF_TERM = TRUE \| TNM_NET = tnm_sysclk
sysclk_n	LOC = K16 \| IOSTANDARD = LVDS_25 \| DIFF_TERM = TRUE
TS_sysclk	PERIOD tnm_sysclk 200MHz
clk_ipb	TNM_NET = tnm_clk_ipb
infra/clk_125	TNM_NET = tnm_clk_125
TS_tig_ipb_125	FROM tnm_clk_ipb TO tnm_clk_125 TIG
TS_tig_125_ipb	FROM tnm_clk_125 TO tnm_clk_ipb TIG
leds<0>	LOC = E13 \| IOSTANDARD = LVCMOS25
leds<1>	LOC = C14 \| IOSTANDARD = LVCMOS25
leds<2>	LOC = C4 \| IOSTANDARD = LVCMOS25
leds<3>	LOC = A4 \| IOSTANDARD = LVCMOS25
dip_switch<0>	LOC = D14
dip_switch<1>	LOC = E12
dip_switch<2>	LOC = F12
dip_switch<3>	LOC = V13
TG_gmii_tx	*PADS ( " gmii_tx " )**
TG_gmii_tx	FSET = OUT AFTER sysclk_p REFERENCE_PIN " gmii_gtx_clk " RISING
gmii_gtx_clk	LOC = A9 \| IOSTANDARD = LVCMOS25 \| SLEW = FAST
gmii_txd<0>	LOC = F8 \| IOSTANDARD = LVCMOS25
gmii_txd<1>	LOC = G8 \| IOSTANDARD = LVCMOS25
gmii_txd<2>	LOC = A6 \| IOSTANDARD = LVCMOS25
gmii_txd<3>	LOC = B6 \| IOSTANDARD = LVCMOS25
gmii_txd<4>	LOC = E6 \| IOSTANDARD = LVCMOS25
gmii_txd<5>	LOC = F7 \| IOSTANDARD = LVCMOS25
gmii_txd<6>	LOC = A5 \| IOSTANDARD = LVCMOS25
gmii_txd<7>	LOC = C5 \| IOSTANDARD = LVCMOS25
gmii_tx_en	LOC = B8 \| IOSTANDARD = LVCMOS25
gmii_tx_er	LOC = A8 \| IOSTANDARD = LVCMOS25
gmii_rx_clk	LOC = L16 \| IOSTANDARD = LVCMOS25 \| TNM_NET = " gmii_rx_clk "
"TS_GMII_RX_CLK"	PERIOD " gmii_rx_clk " 125MHz
OFFSET	IN 2 .5ns VALID 3ns BEFORE gmii_rx_clk
gmii_rxd<0>	LOC = M14 \| IOSTANDARD = LVCMOS25
gmii_rxd<1>	LOC = U18 \| IOSTANDARD = LVCMOS25
gmii_rxd<2>	LOC = U17 \| IOSTANDARD = LVCMOS25
gmii_rxd<3>	LOC = T18 \| IOSTANDARD = LVCMOS25
gmii_rxd<4>	LOC = T17 \| IOSTANDARD = LVCMOS25
gmii_rxd<5>	LOC = N16 \| IOSTANDARD = LVCMOS25
gmii_rxd<6>	LOC = N15 \| IOSTANDARD = LVCMOS25
gmii_rxd<7>	LOC = P18 \| IOSTANDARD = LVCMOS25
gmii_rx_dv	LOC = N18 \| IOSTANDARD = LVCMOS25
gmii_rx_er	LOC = P17 \| IOSTANDARD = LVCMOS25
phy_rstb	LOC = L13 \| IOSTANDARD = LVCMOS25

Variable Documentation

◆ "TS_GMII_RX_CLK"

"TS_GMII_RX_CLK" PERIOD " gmii_rx_clk " 125MHz

Constraints

◆ clk_ipb

clk_ipb TNM_NET = tnm_clk_ipb

Constraints

◆ dip_switch<0>

dip_switch<0> LOC = D14

Constraints

◆ dip_switch<1>

dip_switch<1> LOC = E12

Constraints

◆ dip_switch<2>

dip_switch<2> LOC = F12

Constraints

◆ dip_switch<3>

dip_switch<3> LOC = V13

Constraints

◆ gmii_gtx_clk

gmii_gtx_clk LOC = A9 | IOSTANDARD = LVCMOS25 | SLEW = FAST

Constraints

◆ gmii_rx_clk

gmii_rx_clk LOC = L16 | IOSTANDARD = LVCMOS25 | TNM_NET = " gmii_rx_clk "

Constraints

◆ gmii_rx_dv

gmii_rx_dv LOC = N18 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rx_er

gmii_rx_er LOC = P17 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<0>

gmii_rxd<0> LOC = M14 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<1>

gmii_rxd<1> LOC = U18 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<2>

gmii_rxd<2> LOC = U17 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<3>

gmii_rxd<3> LOC = T18 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<4>

gmii_rxd<4> LOC = T17 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<5>

gmii_rxd<5> LOC = N16 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<6>

gmii_rxd<6> LOC = N15 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_rxd<7>

gmii_rxd<7> LOC = P18 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_tx_en

gmii_tx_en LOC = B8 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_tx_er

gmii_tx_er LOC = A8 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<0>

gmii_txd<0> LOC = F8 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<1>

gmii_txd<1> LOC = G8 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<2>

gmii_txd<2> LOC = A6 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<3>

gmii_txd<3> LOC = B6 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<4>

gmii_txd<4> LOC = E6 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<5>

gmii_txd<5> LOC = F7 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<6>

gmii_txd<6> LOC = A5 | IOSTANDARD = LVCMOS25

Constraints

◆ gmii_txd<7>

gmii_txd<7> LOC = C5 | IOSTANDARD = LVCMOS25

Constraints

◆ infra/clk_125

infra/clk_125 TNM_NET = tnm_clk_125

Constraints

◆ leds<0>

leds<0> LOC = E13 | IOSTANDARD = LVCMOS25

Constraints

◆ leds<1>

leds<1> LOC = C14 | IOSTANDARD = LVCMOS25

Constraints

◆ leds<2>

leds<2> LOC = C4 | IOSTANDARD = LVCMOS25

Constraints

◆ leds<3>

leds<3> LOC = A4 | IOSTANDARD = LVCMOS25

Constraints

◆ OFFSET

OFFSET IN 2 .5ns VALID 3ns BEFORE gmii_rx_clk

Constraints

◆ phy_rstb

phy_rstb LOC = L13 | IOSTANDARD = LVCMOS25

Constraints

◆ sysclk_n

sysclk_n LOC = K16 | IOSTANDARD = LVDS_25 | DIFF_TERM = TRUE

Constraints

◆ sysclk_p

sysclk_p LOC = K15 | IOSTANDARD = LVDS_25 | DIFF_TERM = TRUE | TNM_NET = tnm_sysclk

Constraints

◆ TG_gmii_tx [1/2]

TG_gmii_tx PADS ( " gmii_tx* " )

Constraints

◆ TG_gmii_tx [2/2]

TG_gmii_tx FSET = OUT AFTER sysclk_p REFERENCE_PIN " gmii_gtx_clk " RISING

Constraints

◆ TS_sysclk

TS_sysclk PERIOD tnm_sysclk 200MHz

Constraints

◆ TS_tig_125_ipb

TS_tig_125_ipb FROM tnm_clk_125 TO tnm_clk_ipb TIG

Constraints

◆ TS_tig_ipb_125

TS_tig_ipb_125 FROM tnm_clk_ipb TO tnm_clk_125 TIG

Constraints