Constraints
infra/eth/clk125_out	TNM_NET = clk125
TS_clk125	PERIOD clk125 8ns
infra/clocks/rst	TIG
infra/clocks/nuke_i	TIG
eth_clkp	LOC = M6 \| DIFF_TERM = TRUE \| TNM_NET = eth_clk
eth_clkn	LOC = M5 \| DIFF_TERM = TRUE
TS_eth_clk	PERIOD eth_clk 8ns
infra	RANGE = CLOCKREGION_X1Y2
infra/*	AREA_GROUP = infra
phy_rstb	LOC = AK16 \| IOSTANDARD = LVCMOS25
leds<*>	IOSTANDARD = LVCMOS25
leds<0>	LOC = AF31
leds<1>	LOC = AB25
leds<2>	LOC = AC25
v6_cpld<*>	IOSTANDARD = LVCMOS25
v6_cpld<0>	LOC = AE32
v6_cpld<1>	LOC = AB27
v6_cpld<2>	LOC = AC27
v6_cpld<3>	LOC = AG33
v6_cpld<4>	LOC = AG32
v6_cpld<5>	LOC = AA26
fpga_scl	LOC = AP20 \| IOSTANDARD = LVCMOS25
fpga_sda	LOC = AP21 \| IOSTANDARD = LVCMOS25
xpoint_ctrl<*>	IOSTANDARD = LVCMOS25
LOC = AK21	xpoint_ctrl<0> xpoint1_s40
LOC = AG22	xpoint_ctrl<1> xpoint1_s30
LOC = AJ22	xpoint_ctrl<2> xpoint1_s20
LOC = AN19	xpoint_ctrl<3> xpoint1_s10
LOC = AJ21	xpoint_ctrl<4> xpoint1_s41
LOC = AL20	xpoint_ctrl<5> xpoint1_s31
LOC = AH22	xpoint_ctrl<6> xpoint1_s32
LOC = AM18	xpoint_ctrl<7> xpoint1_s11
xpoint_ctrl<8>	xpoint2_s0
xpoint_ctrl<9>	xpoint2_s1

Variable Documentation

◆ eth_clkn

eth_clkn LOC = M5 | DIFF_TERM = TRUE

Constraints

◆ eth_clkp

eth_clkp LOC = M6 | DIFF_TERM = TRUE | TNM_NET = eth_clk

Constraints

◆ fpga_scl

fpga_scl LOC = AP20 | IOSTANDARD = LVCMOS25

Constraints

◆ fpga_sda

fpga_sda LOC = AP21 | IOSTANDARD = LVCMOS25

Constraints

◆ infra/*

infra/* AREA_GROUP = infra

Constraints

◆ infra/clocks/nuke_i

infra/clocks/nuke_i TIG

Constraints

◆ infra/clocks/rst

infra/clocks/rst TIG

Constraints

◆ infra/eth/clk125_out

infra/eth/clk125_out TNM_NET = clk125

Constraints

◆ infra

infra RANGE = CLOCKREGION_X1Y2

Constraints

◆ leds<*>

leds<*> IOSTANDARD = LVCMOS25

Constraints

◆ leds<0>

leds<0> LOC = AF31

Constraints

◆ leds<1>

leds<1> LOC = AB25

Constraints

◆ leds<2>

leds<2> LOC = AC25

Constraints

◆ phy_rstb

phy_rstb LOC = AK16 | IOSTANDARD = LVCMOS25

Constraints

◆ TS_clk125

TS_clk125 PERIOD clk125 8ns

Constraints

◆ TS_eth_clk

TS_eth_clk PERIOD eth_clk 8ns

Constraints

◆ v6_cpld<*>

v6_cpld<*> IOSTANDARD = LVCMOS25

Constraints

◆ v6_cpld<0>

v6_cpld<0> LOC = AE32

Constraints

◆ v6_cpld<1>

v6_cpld<1> LOC = AB27

Constraints

◆ v6_cpld<2>

v6_cpld<2> LOC = AC27

Constraints

◆ v6_cpld<3>

v6_cpld<3> LOC = AG33

Constraints

◆ v6_cpld<4>

v6_cpld<4> LOC = AG32

Constraints

◆ v6_cpld<5>

v6_cpld<5> LOC = AA26

Constraints

◆ xpoint_ctrl<*>

xpoint_ctrl<*> IOSTANDARD = LVCMOS25

Constraints

◆ xpoint_ctrl<0>

xpoint_ctrl<0> LOC = AK21 xpoint1_s40

Constraints

◆ xpoint_ctrl<1>

xpoint_ctrl<1> LOC = AG22 xpoint1_s30

Constraints

◆ xpoint_ctrl<2>

xpoint_ctrl<2> LOC = AJ22 xpoint1_s20

Constraints

◆ xpoint_ctrl<3>

xpoint_ctrl<3> LOC = AN19 xpoint1_s10

Constraints

◆ xpoint_ctrl<4>

xpoint_ctrl<4> LOC = AJ21 xpoint1_s41

Constraints

◆ xpoint_ctrl<5>

xpoint_ctrl<5> LOC = AL20 xpoint1_s31

Constraints

◆ xpoint_ctrl<6>

xpoint_ctrl<6> LOC = AH22 xpoint1_s32

Constraints

◆ xpoint_ctrl<7>

xpoint_ctrl<7> LOC = AM18 xpoint1_s11

Constraints

◆ xpoint_ctrl<8>

xpoint_ctrl<8> LOC = AN18 xpoint2_s0

Constraints

◆ xpoint_ctrl<9>

xpoint_ctrl<9> LOC = AP19 xpoint2_s1

Constraints