ROD Firmware

Firmware for the L1Calo ROD module

This project uses Hog.

There are two varients of the ROD firmware:

Documentation

The ROD firmware documentation here is created using Doxygen. It is intended for specialists who are required to work on, or with, the firmware (e.g. to maintain it). For a broader overview of the ROD, including the hardware and firmware, and Flash Programmer, please see the following documentsL

Technical Specifications for ROD and RODprog https://edms.cern.ch/document/1404559/2

ROD User's Guide https://edms.cern.ch/document/1404559/2

Readout Control and Combined TTC links https://edms.cern.ch/ui/#!master/navigator/document?D:1011507931:1011507931:subDocs https://edms.cern.ch/document/1492098/1

eFeX System Readout Formats https://edms.cern.ch/ui/#!master/navigator/document?D:1015285279:1015285279:subDocs https://edms.cern.ch/document/1419789/1

Firmware Releases: https://efex.web.cern.ch/efex/

Felix Fibre connection https://edms.cern.ch/ui/#!master/navigator/document?P:1008597770:100953901:subDocs

ROD Schematic https://edms.cern.ch/document/1404559/2

The ROD Firmware targets a single Virtex7 550TFFG1927-2 FPGA

The main functionality of the ROD is to capture read-out data from the FEX modules and transmit it to the Felix. Each shelf can contain one or two ROD modules as needed. When two RODs are installed, they will each service half of the events; operating in ping-pong mode. In this mode, one ROD will receive events with an even L1ID and the other will revive events with an odd L1ID.

Two versions of the ROD firmware have been implemented to take into account differences in FEX data interfaces. Each eFEX has a single, 4-lane, channel-bonded Aurora interface. Each of the jFEX and Topo modules have 4 independent, single lane interfaces.
Firmware development and maintenance across these variations is facilitated by partitioning the design into a modular format. Interfaces may be swapped, and processing resources may be scaled to account for the different requirements.

The ROD hardware provides adequate storage for up to eight firmware images. This allows multiple firmware revisions to be easily swapped during testing. It also allows a spare ROD module to be generic; containing all required firmware for any shelf. Individual firmware images may also be updated at any time via IPBus.
In addition to the main datapaths, several control functions have been implemented. There are board-level controls for MiniPods, power supply trimming, monitoring, and physical interface control. And, there are FPGA level controls to manage the datapaths and provide status and instrumentation functions. All of these are programmable through IPBus registers accessible from the network.

Repository instructions:

After cloning the repository (with –recursive), just run:

./CreateProject.sh rod_efex

or

./CreateProject.sh rod_jfex

Launch the command with no argument to get a list of all the projects in the repository.

All projects will be created in the Projects directory.