edge_error_counter Entity Reference

Inheritance diagram for edge_error_counter:

Entities
RTL	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
NUMERIC_STD
STD_LOGIC_UNSIGNED

Generics
cwidth	positive := 4

Ports
clock	in	STD_LOGIC
counter_reset	in	STD_LOGIC
system_reset	in	STD_LOGIC
error	in	STD_LOGIC
error_count	out	STD_LOGIC_VECTOR ( cwidth- 1 downto 0 )

Detailed Description

Definition at line 38 of file edge_error_counter.vhd.

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The documentation for this class was generated from the following file:

• ROD/packet_processor/hdl/edge_error_counter.vhd