Index of /efex/firmware/ROD/official/v1.0.5/rod_jfex_p2-v1.0.5/reports
Name Last modified Size Description
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Parent Directory -
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DPram_32b_synth_1.log 2025-01-03 18:13 35K
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DPram_32b_utilization_synth.rpt 2025-01-03 18:13 7.8K
MGT_combined_ttc_rx_synth_1.log 2025-01-03 18:13 63K
MGT_combined_ttc_rx_utilization_synth.rpt 2025-01-03 18:13 8.5K
aurora_1ln_rx_lpm_synth_1.log 2025-01-03 18:13 133K
aurora_1ln_rx_lpm_utilization_synth.rpt 2025-01-03 18:13 8.5K
aurora_fifo_in_ila_synth_1.log 2025-01-03 18:13 254K
aurora_fifo_in_ila_utilization_synth.rpt 2025-01-03 18:13 8.7K
aurora_fifo_out_ila_synth_1.log 2025-01-03 18:13 247K
aurora_fifo_out_ila_utilization_synth.rpt 2025-01-03 18:13 8.6K
aurora_in_fifo_synth_1.log 2025-01-03 18:13 53K
aurora_in_fifo_utilization_synth.rpt 2025-01-03 18:13 8.3K
axis_data_fifo_0_synth_1.log 2025-01-03 18:13 47K
axis_data_fifo_0_utilization_synth.rpt 2025-01-03 18:13 8.3K
axis_dwidth_64_32_synth_1.log 2025-01-03 18:13 33K
axis_dwidth_64_32_utilization_synth.rpt 2025-01-03 18:13 7.9K
axis_input_fifo_synth_1.log 2025-01-03 18:13 49K
axis_input_fifo_utilization_synth.rpt 2025-01-03 18:13 8.2K
bulk_data_fifo_synth_1.log 2025-01-03 18:13 3.0K
clk_wiz_240_synth_1.log 2025-01-03 18:13 21K
clk_wiz_240_utilization_synth.rpt 2025-01-03 18:13 7.8K
dwidth_convert_synth_1.log 2025-01-03 18:13 31K
dwidth_convert_utilization_synth.rpt 2025-01-03 18:13 8.0K
ethernet_mac_rgmii_synth_1.log 2025-01-03 18:13 89K
ethernet_mac_rgmii_utilization_synth.rpt 2025-01-03 18:13 9.3K
event_builder_fifo_synth_1.log 2025-01-03 18:13 42K
event_builder_fifo_utilization_synth.rpt 2025-01-03 18:13 8.2K
fifo1KB_34bit_synth_1.log 2025-01-03 18:13 50K
fifo1KB_34bit_utilization_synth.rpt 2025-01-03 18:13 8.4K
fm_status_fifo_synth_1.log 2025-01-03 18:13 50K
fm_status_fifo_utilization_synth.rpt 2025-01-03 18:13 8.4K
hierarchical_utilization.txt 2025-01-03 18:13 6.2M
ila_1_synth_1.log 2025-01-03 18:13 237K
ila_1_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_2_synth_1.log 2025-01-03 18:13 251K
ila_2_utilization_synth.rpt 2025-01-03 18:13 8.6K
ila_ev_builder_synth_1.log 2025-01-03 18:13 269K
ila_ev_builder_utilization_synth.rpt 2025-01-03 18:13 8.6K
ila_fifo_synth_1.log 2025-01-03 18:13 252K
ila_fifo_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_fullmode_synth_1.log 2025-01-03 18:13 253K
ila_fullmode_utilization_synth.rpt 2025-01-03 18:13 8.6K
ila_l1id_cont_synth_1.log 2025-01-03 18:13 251K
ila_l1id_cont_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_mgtfsm_synth_1.log 2025-01-03 18:13 243K
ila_mgtfsm_utilization_synth.rpt 2025-01-03 18:13 8.5K
ila_ttc_in_synth_1.log 2025-01-03 18:13 253K
ila_ttc_in_utilization_synth.rpt 2025-01-03 18:13 8.6K
ila_ttc_out_synth_1.log 2025-01-03 18:13 244K
ila_ttc_out_utilization_synth.rpt 2025-01-03 18:13 8.6K
impl_1.log 2025-01-03 18:13 499K
packet_processor_clock_synth_1.log 2025-01-03 18:13 22K
packet_processor_clock_utilization_synth.rpt 2025-01-03 18:13 7.8K
processor_in_fifo_synth_1.log 2025-01-03 18:13 48K
processor_in_fifo_utilization_synth.rpt 2025-01-03 18:13 8.5K
rgmii_rx_fifo_2_synth_1.log 2025-01-03 18:13 42K
rgmii_rx_fifo_2_utilization_synth.rpt 2025-01-03 18:13 8.2K
rod_RO_Tx_synth_1.log 2025-01-03 18:13 52K
rod_RO_Tx_utilization_synth.rpt 2025-01-03 18:13 8.5K
rod_ROctrl_mux_ila_synth_1.log 2025-01-03 18:13 247K
rod_ROctrl_mux_ila_utilization_synth.rpt 2025-01-03 18:13 8.5K
route_report_utilization_0.rpt 2025-01-03 18:13 15K
synth_1.log 2025-01-03 18:13 1.2M
top_rod_jfex_p2_bus_skew_routed.rpt 2025-01-03 18:13 3.4M
top_rod_jfex_p2_clock_utilization_routed.rpt 2025-01-03 18:13 340K
top_rod_jfex_p2_control_sets_placed.rpt 2025-01-03 18:13 6.1M
top_rod_jfex_p2_drc_opted.rpt 2025-01-03 18:13 41K
top_rod_jfex_p2_drc_routed.rpt 2025-01-03 18:13 47K
top_rod_jfex_p2_io_placed.rpt 2025-01-03 18:13 608K
top_rod_jfex_p2_methodology_drc_routed.rpt 2025-01-03 18:13 839K
top_rod_jfex_p2_power_routed.rpt 2025-01-03 18:13 42K
top_rod_jfex_p2_route_status.rpt 2025-01-03 18:13 651
top_rod_jfex_p2_timing_summary_routed.rpt 2025-01-03 18:13 46M
top_rod_jfex_p2_timing_summary_routed_1.rpt 2025-01-03 18:13 1.4M
top_rod_jfex_p2_utilization_placed.rpt 2025-01-03 18:13 15K
top_rod_jfex_p2_utilization_synth.rpt 2025-01-03 18:13 11K
ttc_header_fifo_synth_1.log 2025-01-03 18:13 52K
ttc_header_fifo_utilization_synth.rpt 2025-01-03 18:13 8.4K
vio_0_synth_1.log 2025-01-03 18:13 2.8K
vio_fullmode_reset_synth_1.log 2025-01-03 18:13 34K
vio_fullmode_reset_utilization_synth.rpt 2025-01-03 18:13 8.0K
vio_ip_address_synth_1.log 2025-01-03 18:13 33K
vio_ip_address_utilization_synth.rpt 2025-01-03 18:13 8.0K
vio_top_synth_1.log 2025-01-03 18:13 33K
vio_top_utilization_synth.rpt 2025-01-03 18:13 8.0K
vio_ttc_synth_1.log 2025-01-03 18:13 32K
vio_ttc_utilization_synth.rpt 2025-01-03 18:13 8.0K