eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

Back to eFEX documentation
Libraries | Ports | Use Clauses
SRLC32E_226 Entity Reference

shift register More...

Inheritance diagram for SRLC32E_226:
top_synch data_alignment data_path_block top_efex_processor

Entities

Behavioral  architecture
 shift register More...
 

Libraries

ieee 
UNISIM 

Use Clauses

std_logic_1164 
std_logic_arith 
vcomponents 

Ports

clk   in   std_logic
  clock
srl_en   in   std_logic
  enable of shifter
address   in   std_logic_vector ( 4 downto 0 )
  shift depth
data_in   in   std_logic_vector ( 227 downto 0 )
  data in
data_out   out   std_logic_vector ( 227 downto 0 )
  data out

Detailed Description

shift register

Shift register that use xilinx SRL32E It can shift up to 5-bit shift depth and can be select through ipbus

Author
Mohammed Siyad

Definition at line 13 of file srl32e_226.vhd.


The documentation for this class was generated from the following file: