TOB_synch Entity Reference

TOB synchronisation module. More...

Inheritance diagram for TOB_synch:

Entities
Behavioral	architecture
	TOB synchronisation module. More...

Libraries
IEEE
work

Use Clauses
STD_LOGIC_1164
NUMERIC_STD
DataTypes	Package <DataTypes>
AlgoDataTypes	Package <AlgoDataTypes>

Ports
CLK	in	std_logic
IN_Offset0	in	std_logic_vector ( 5 downto 0 )
IN_Offset1	in	std_logic_vector ( 5 downto 0 )
IN_Offset2	in	std_logic_vector ( 5 downto 0 )
IN_Offset3	in	std_logic_vector ( 5 downto 0 )
IN_BCN	in	std_logic_vector ( 11 downto 0 )
OUT_BCN	out	std_logic_vector ( 11 downto 0 )
IN_Enable0	in	std_logic
IN_Enable1	in	std_logic
IN_Enable2	in	std_logic
IN_Enable3	in	std_logic
IN_Start	in	std_logic
OUT_Start	out	std_logic
IN_Data	in	AlgoTriggerObjects ( 3 downto 0 )
OUT_Data	out	AlgoTriggerObjects ( 3 downto 0 )

Detailed Description

TOB synchronisation module.

Delays each of the 4 input data bus by a number of clock cycles specified by offset. The maximum delay is 63 clock cycles, the minimum is 0. The IN_Start signal must be synchronous with input data 0 and will be delayed by Offset0.

Author

Francesco Gonnella

Definition at line 18 of file TOB_synch.vhd.

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The documentation for this class was generated from the following file:

• Algorithm/hdl/TOB_synch.vhd