rtl Architecture Reference

Components
temac_gbe_v9_0
mac_fifo_axi4

Signals
rx_data_e	std_logic_vector ( 7 downto 0 )
rx_clk_e	std_logic
rx_valid_e	std_logic
rx_last_e	std_logic
rx_user_e	std_logic
rx_rst_e	std_logic
rx_rst_en	std_logic
rstn	std_logic
rx_user_f	std_logic_vector ( 0 downto 0 )
rx_user_ef	std_logic_vector ( 0 downto 0 )

Attributes
IODELAY_GROUP	STRING
IODELAY_GROUP	label is " tri_mode_ethernet_mac_iodelay_grp "

Instantiations
idelayctrl0	idelayctrl
emac0	temac_gbe_v9_0
fifo	mac_fifo_axi4

Detailed Description

Definition at line 45 of file eth_7s_gmii.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/control_fpga/src/eth_gmii/eth_7s_gmii.vhd