interface_proc_fpga Entity Reference

Inheritance diagram for interface_proc_fpga:

Entities
struct	architecture

Libraries
ieee
ipbus_lib

Use Clauses
std_logic_1164
std_logic_arith

Generics
IPBUFWIDTH	positive := 5

Ports
mac_clk	in	std_logic
mac_rx_data	in	std_logic_vector ( 7 DOWNTO 0 )
mac_rx_error	in	std_logic
mac_rx_last	in	std_logic
mac_rx_valid	in	std_logic
mac_tx_ready	in	STD_LOGIC
master_tx_data	in	std_logic_vector ( 8 DOWNTO 0 )
master_tx_err	in	std_logic
rarp_rx_data	in	std_logic_vector ( 7 DOWNTO 0 )
rarp_rx_last	in	std_logic
rarp_rx_valid	in	std_logic
rst_macclk	in	std_logic
mac_tx_data	out	STD_LOGIC_VECTOR ( 7 DOWNTO 0 )
mac_tx_error	out	STD_LOGIC
mac_tx_last	out	STD_LOGIC
mac_tx_valid	out	STD_LOGIC
master_rx_data	out	std_logic_vector ( 8 DOWNTO 0 )
master_tx_pause	out	STD_LOGIC
master_link_down	in	std_logic
slaves_Got_IP_addr	out	std_logic

Detailed Description

Definition at line 15 of file interface_proc_fpga_struct.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/control_fpga/src/inter_fpga/interface_proc_fpga_struct.vhd