ipbus_decode_efex_cntrl_data_path Package Reference

Package Body >> ipbus_decode_efex_cntrl_data_path

Functions
ipbus_sel_t	ipbus_sel_efex_cntrl_data_path ( addr: in in std_logic_vector( 31 downto 0) )

Libraries
ieee

Use Clauses
std_logic_1164
numeric_std

Constants
IPBUS_SEL_WIDTH	positive := 6
N_SLV_CONTROL	integer := 0
N_SLV_FIFO_CONTROL	integer := 1
N_SLV_TOB_MGT_STATUS_P0	integer := 2
N_SLV_TOB_MGT_STATUS_P1	integer := 3
N_SLV_TOB_MGT_STATUS_P2	integer := 4
N_SLV_TOB_MGT_STATUS_P3	integer := 5
N_SLV_RAW_MGT_STATUS_P0	integer := 6
N_SLV_RAW_MGT_STATUS_P1	integer := 7
N_SLV_RAW_MGT_STATUS_P2	integer := 8
N_SLV_RAW_MGT_STATUS_P3	integer := 9
N_SLV_TOB_FIFO_STATUS_A_P0	integer := 10
N_SLV_TOB_FIFO_STATUS_A_P1	integer := 11
N_SLV_TOB_FIFO_STATUS_A_P2	integer := 12
N_SLV_TOB_FIFO_STATUS_A_P3	integer := 13
N_SLV_TOB_FIFO_STATUS_B_P0	integer := 14
N_SLV_TOB_FIFO_STATUS_B_P1	integer := 15
N_SLV_TOB_FIFO_STATUS_B_P2	integer := 16
N_SLV_TOB_FIFO_STATUS_B_P3	integer := 17
N_SLV_RAW_FIFO_STATUS_P0	integer := 18
N_SLV_RAW_FIFO_STATUS_P1	integer := 19
N_SLV_RAW_FIFO_STATUS_P2	integer := 20
N_SLV_RAW_FIFO_STATUS_P3	integer := 21
N_SLV_TOB_MERGER_STATUS_A_MERGER	integer := 22
N_SLV_TOB_MERGER_STATUS_A_P0	integer := 23
N_SLV_TOB_MERGER_STATUS_A_P1	integer := 24
N_SLV_TOB_MERGER_STATUS_A_P2	integer := 25
N_SLV_TOB_MERGER_STATUS_A_P3	integer := 26
N_SLV_TOB_MERGER_STATUS_B_MERGER	integer := 27
N_SLV_TOB_MERGER_STATUS_B_P0	integer := 28
N_SLV_TOB_MERGER_STATUS_B_P1	integer := 29
N_SLV_TOB_MERGER_STATUS_B_P2	integer := 30
N_SLV_TOB_MERGER_STATUS_B_P3	integer := 31
N_SLV_MERGED_FIFO_STATUS_A_TOB	integer := 32
N_SLV_MERGED_FIFO_STATUS_A_DEBUG	integer := 33
N_SLV_MERGED_FIFO_STATUS_B_TOB	integer := 34
N_SLV_MERGED_FIFO_STATUS_B_DEBUG	integer := 35
N_SLV_MUX_STATUS_A_MUX_ACTIVE	integer := 36
N_SLV_MUX_STATUS_A_TOB	integer := 37
N_SLV_MUX_STATUS_A_DEBUG	integer := 38
N_SLV_MUX_STATUS_A_RAW_0	integer := 39
N_SLV_MUX_STATUS_A_RAW_1	integer := 40
N_SLV_MUX_STATUS_A_RAW_2	integer := 41
N_SLV_MUX_STATUS_A_RAW_3	integer := 42
N_SLV_MUX_STATUS_B_MUX_ACTIVE	integer := 43
N_SLV_MUX_STATUS_B_TOB	integer := 44
N_SLV_MUX_STATUS_B_DEBUG	integer := 45
N_SLV_MUX_STATUS_B_RAW_0	integer := 46
N_SLV_MUX_STATUS_B_RAW_1	integer := 47
N_SLV_MUX_STATUS_B_RAW_2	integer := 48
N_SLV_MUX_STATUS_B_RAW_3	integer := 49
N_SLV_TOB_MGT_P0_SPY_RAM	integer := 50
N_SLV_TOB_MGT_P1_SPY_RAM	integer := 51
N_SLV_TOB_MGT_P2_SPY_RAM	integer := 52
N_SLV_TOB_MGT_P3_SPY_RAM	integer := 53
N_SLV_RAW_MGT_P0_SPY_RAM	integer := 54
N_SLV_RAW_MGT_P1_SPY_RAM	integer := 55
N_SLV_RAW_MGT_P2_SPY_RAM	integer := 56
N_SLV_RAW_MGT_P3_SPY_RAM	integer := 57
N_SLV_AURORA_CHANNEL0_SPY_RAM	integer := 58
N_SLV_AURORA_CHANNEL1_SPY_RAM	integer := 59
N_SLV_TOB_MERGER_A_DEBUG_SPY_RAM	integer := 60
N_SLV_TOB_MERGER_B_DEBUG_SPY_RAM	integer := 61
N_SLAVES	integer := 62

Subtypes
ipbus_sel_t	std_logic_vector ( IPBUS_SEL_WIDTH- 1 downto 0 )

Detailed Description

Definition at line 15 of file ipbus_decode_efex_cntrl_data_path.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/address_table/ipbus_decode_efex_cntrl_data_path.vhd