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eFEX firmware
1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards
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eFEX firmware
1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards
|
Input Data Multiplexer for Tau: addresses SuperCells to the correct sum area. More...
Entities | |
| Behavioral | architecture |
| Input Data Multiplexer for Tau: addresses SuperCells to the correct sum area. More... | |
Libraries | |
| IEEE | |
| work | |
Use Clauses | |
| STD_LOGIC_1164 | |
| NUMERIC_STD | |
| DataTypes | Package <DataTypes> |
Ports | ||
| CLK | in | std_logic |
| 200 MHz clock | ||
| IN_Seed | in | std_logic_vector ( 1 downto 0 ) |
| IN_UpNotDown | in | std_logic |
| IN_Towers | in | TriggerTowers ( 8 downto 0 ) |
| OUT_Energy_L1 | out | DataWords ( 9 downto 0 ) |
| OUT_Energy_L2 | out | DataWords ( 9 downto 0 ) |
| OUT_Energy_L0 | out | DataWords ( 5 downto 0 ) |
| OUT_Energy_L3 | out | DataWords ( 5 downto 0 ) |
| OUT_Energy_HAD | out | DataWords ( 5 downto 0 ) |
| OUT_JetCoreData | out | DataWords ( 5 downto 0 ) |
| OUT_JetEnvData | out | DataWords ( 11 downto 0 ) |
Input Data Multiplexer for Tau: addresses SuperCells to the correct sum area.
The selector of this mux is the seed of the cluster (IN_Seed) plus the phi asimmetry (IN_UpNotDown). According to these values, all the supercells contained in the 9 TTs are addressed to the proper place.
This mux is registerd and the latency is 2 clock cycles, to mach the seed finder.
Definition at line 19 of file tauInputMultiplexer.vhd.
1.9.1